| Message ID | 20240129174703.1175426-6-andre.draszik@linaro.org (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | gs101 oriole: peripheral block 1 (peric1) and i2c12 support | expand |
On 1/29/24 17:46, André Draszik wrote: > Enable the cmu-peric1 clock controller. It feeds additional USI, I3C > and PWM interfaces / busses. > > Note that &sysreg_peric1 needs a clock to be able to access its > registers and now that Linux knows about this clock, we need to add it > in this commit as well so as to keep &sysreg_peric1 working, so that > the clock can be enabled as and when needed. > > Signed-off-by: André Draszik <andre.draszik@linaro.org> > Reviewed-by: Sam Protsenko <semen.protsenko@linaro.org> > Reviewed-by: Peter Griffin <peter.griffin@linaro.org> Reviewed-by: Tudor Ambarus <tudor.ambarus@linaro.org> > > --- > v2: > * merge patch #8 from original series version 1 into this patch, i.e. > add the clock to &sysreg_peric1 in this commit & update commit message > * collect Reviewed-by: tags > --- > arch/arm64/boot/dts/exynos/google/gs101.dtsi | 11 +++++++++++ > 1 file changed, 11 insertions(+) > > diff --git a/arch/arm64/boot/dts/exynos/google/gs101.dtsi b/arch/arm64/boot/dts/exynos/google/gs101.dtsi > index aaac04df5e65..e1bcf490309a 100644 > --- a/arch/arm64/boot/dts/exynos/google/gs101.dtsi > +++ b/arch/arm64/boot/dts/exynos/google/gs101.dtsi > @@ -429,9 +429,20 @@ serial_0: serial@10a00000 { > }; > }; > > + cmu_peric1: clock-controller@10c00000 { > + compatible = "google,gs101-cmu-peric1"; > + reg = <0x10c00000 0x4000>; > + #clock-cells = <1>; > + clocks = <&ext_24_5m>, > + <&cmu_top CLK_DOUT_CMU_PERIC1_BUS>, > + <&cmu_top CLK_DOUT_CMU_PERIC1_IP>; > + clock-names = "oscclk", "bus", "ip"; > + }; > + > sysreg_peric1: syscon@10c20000 { > compatible = "google,gs101-peric1-sysreg", "syscon"; > reg = <0x10c20000 0x10000>; > + clocks = <&cmu_peric1 CLK_GOUT_PERIC1_SYSREG_PERIC1_PCLK>; > }; > > pinctrl_peric1: pinctrl@10c40000 {
diff --git a/arch/arm64/boot/dts/exynos/google/gs101.dtsi b/arch/arm64/boot/dts/exynos/google/gs101.dtsi index aaac04df5e65..e1bcf490309a 100644 --- a/arch/arm64/boot/dts/exynos/google/gs101.dtsi +++ b/arch/arm64/boot/dts/exynos/google/gs101.dtsi @@ -429,9 +429,20 @@ serial_0: serial@10a00000 { }; }; + cmu_peric1: clock-controller@10c00000 { + compatible = "google,gs101-cmu-peric1"; + reg = <0x10c00000 0x4000>; + #clock-cells = <1>; + clocks = <&ext_24_5m>, + <&cmu_top CLK_DOUT_CMU_PERIC1_BUS>, + <&cmu_top CLK_DOUT_CMU_PERIC1_IP>; + clock-names = "oscclk", "bus", "ip"; + }; + sysreg_peric1: syscon@10c20000 { compatible = "google,gs101-peric1-sysreg", "syscon"; reg = <0x10c20000 0x10000>; + clocks = <&cmu_peric1 CLK_GOUT_PERIC1_SYSREG_PERIC1_PCLK>; }; pinctrl_peric1: pinctrl@10c40000 {