diff mbox series

[v5,05/11] arm64: dts: qcom: x1e80100: Add TCSR node

Message ID 20240126-x1e80100-dts-missing-nodes-v5-5-3bb716fb2af9@linaro.org (mailing list archive)
State Superseded
Headers show
Series arm64: dts: qcom: Add more support to X1E80100 base dtsi, CRD and QCP boards | expand

Commit Message

Abel Vesa Jan. 26, 2024, 10 a.m. UTC 
Add the TCSR clock controller and register space node.

Signed-off-by: Abel Vesa <abel.vesa@linaro.org>
---
 arch/arm64/boot/dts/qcom/x1e80100.dtsi | 8 ++++++++
 1 file changed, 8 insertions(+)

Comments

Konrad Dybcio Feb. 1, 2024, 7:18 p.m. UTC | #1 
On 26.01.2024 11:00, Abel Vesa wrote:
> Add the TCSR clock controller and register space node.
> 
> Signed-off-by: Abel Vesa <abel.vesa@linaro.org>
> ---

Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>

Konrad
diff mbox series

Patch

diff --git a/arch/arm64/boot/dts/qcom/x1e80100.dtsi b/arch/arm64/boot/dts/qcom/x1e80100.dtsi
index be69e71b7f53..2b6c55a486b2 100644
--- a/arch/arm64/boot/dts/qcom/x1e80100.dtsi
+++ b/arch/arm64/boot/dts/qcom/x1e80100.dtsi
@@ -2606,6 +2606,14 @@  tcsr_mutex: hwlock@1f40000 {
 			#hwlock-cells = <1>;
 		};
 
+		tcsr: clock-controller@1fc0000 {
+			compatible = "qcom,x1e80100-tcsr", "syscon";
+			reg = <0 0x01fc0000 0 0x30000>;
+			clocks = <&rpmhcc RPMH_CXO_CLK>;
+			#clock-cells = <1>;
+			#reset-cells = <1>;
+		};
+
 		gem_noc: interconnect@26400000 {
 			compatible = "qcom,x1e80100-gem-noc";
 			reg = <0 0x26400000 0 0x311200>;