[v5,00/12] RISCV: Add kvm Sstc timer selftests

Message ID	cover.1705916069.git.haibo1.xu@intel.com (mailing list archive)
Headers	show Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.7]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 155B93A1A2; Mon, 22 Jan 2024 09:45:01 +0000 (UTC) From: Haibo Xu <haibo1.xu@intel.com> To: Cc: xiaobo55x@gmail.com, ajones@ventanamicro.com, Haibo Xu <haibo1.xu@intel.com>, Paul Walmsley <paul.walmsley@sifive.com>, Palmer Dabbelt <palmer@dabbelt.com>, Albert Ou <aou@eecs.berkeley.edu>, Paolo Bonzini <pbonzini@redhat.com>, Shuah Khan <shuah@kernel.org>, Marc Zyngier <maz@kernel.org>, Oliver Upton <oliver.upton@linux.dev>, James Morse <james.morse@arm.com>, Suzuki K Poulose <suzuki.poulose@arm.com>, Zenghui Yu <yuzenghui@huawei.com>, Anup Patel <anup@brainfault.org>, Atish Patra <atishp@atishpatra.org>, Guo Ren <guoren@kernel.org>, Conor Dooley <conor.dooley@microchip.com>, Mayuresh Chitale <mchitale@ventanamicro.com>, wchen <waylingii@gmail.com>, Greentime Hu <greentime.hu@sifive.com>, Jisheng Zhang <jszhang@kernel.org>, Samuel Holland <samuel@sholland.org>, Minda Chen <minda.chen@starfivetech.com>, Sean Christopherson <seanjc@google.com>, Peter Xu <peterx@redhat.com>, Like Xu <likexu@tencent.com>, Vipin Sharma <vipinsh@google.com>, Thomas Huth <thuth@redhat.com>, Aaron Lewis <aaronlewis@google.com>, Maciej Wieczor-Retman <maciej.wieczor-retman@intel.com>, linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org, kvm@vger.kernel.org, linux-kselftest@vger.kernel.org, linux-arm-kernel@lists.infradead.org, kvmarm@lists.linux.dev, kvm-riscv@lists.infradead.org Subject: [PATCH v5 00/12] RISCV: Add kvm Sstc timer selftests Date: Mon, 22 Jan 2024 17:58:30 +0800 Message-Id: <cover.1705916069.git.haibo1.xu@intel.com> Precedence: bulk MIME-Version: 1.0 Content-Transfer-Encoding: 8bit
Series	RISCV: Add kvm Sstc timer selftests \| expand [v5,00/12] RISCV: Add kvm Sstc timer selftests [v5,01/12] selftests/kvm: Fix issues with $(SPLIT_TESTS) [v5,02/12] KVM: arm64: selftests: Data type cleanup for arch_timer test [v5,03/12] KVM: arm64: selftests: Enable tuning of error margin in arch_timer test [v5,04/12] KVM: arm64: selftests: Split arch_timer test code [v5,05/12] KVM: selftests: Add CONFIG_64BIT definition for the build [v5,06/12] tools: riscv: Add header file csr.h [v5,07/12] tools: riscv: Add header file vdso/processor.h [v5,08/12] KVM: riscv: selftests: Switch to use macro from csr.h [v5,09/12] KVM: riscv: selftests: Add exception handling support [v5,10/12] KVM: riscv: selftests: Add guest helper to get vcpu id [v5,11/12] KVM: riscv: selftests: Change vcpu_has_ext to a common function [v5,12/12] KVM: riscv: selftests: Add sstc timer test

Xu, Haibo1 Jan. 22, 2024, 9:58 a.m. UTC

The RISC-V arch_timer selftests is used to validate Sstc timer
functionality in a guest, which sets up periodic timer interrupts
and check the basic interrupt status upon its receipt.

This KVM selftests was ported from aarch64 arch_timer and tested
with Linux v6.7-rc8 on a Qemu riscv64 virt machine.

---
Changed since v4:
  * Rebased to Linux 6.7-rc8
  * Added new patch(2/12) to clean up the data type in struct test_args
  * Re-ordered patch(11/11) in v4 to patch(3/12)
  * Changed the timer_err_margin_us type from int to uint32_t

Haibo Xu (11):
  KVM: arm64: selftests: Data type cleanup for arch_timer test
  KVM: arm64: selftests: Enable tuning of error margin in arch_timer
    test
  KVM: arm64: selftests: Split arch_timer test code
  KVM: selftests: Add CONFIG_64BIT definition for the build
  tools: riscv: Add header file csr.h
  tools: riscv: Add header file vdso/processor.h
  KVM: riscv: selftests: Switch to use macro from csr.h
  KVM: riscv: selftests: Add exception handling support
  KVM: riscv: selftests: Add guest helper to get vcpu id
  KVM: riscv: selftests: Change vcpu_has_ext to a common function
  KVM: riscv: selftests: Add sstc timer test

Paolo Bonzini (1):
  selftests/kvm: Fix issues with $(SPLIT_TESTS)

 tools/arch/riscv/include/asm/csr.h            | 541 ++++++++++++++++++
 tools/arch/riscv/include/asm/vdso/processor.h |  32 ++
 tools/testing/selftests/kvm/Makefile          |  27 +-
 .../selftests/kvm/aarch64/arch_timer.c        | 295 +---------
 tools/testing/selftests/kvm/arch_timer.c      | 259 +++++++++
 .../selftests/kvm/include/aarch64/processor.h |   4 -
 .../selftests/kvm/include/kvm_util_base.h     |   9 +
 .../selftests/kvm/include/riscv/arch_timer.h  |  71 +++
 .../selftests/kvm/include/riscv/processor.h   |  65 ++-
 .../testing/selftests/kvm/include/test_util.h |   2 +
 .../selftests/kvm/include/timer_test.h        |  45 ++
 .../selftests/kvm/lib/riscv/handlers.S        | 101 ++++
 .../selftests/kvm/lib/riscv/processor.c       |  87 +++
 .../testing/selftests/kvm/riscv/arch_timer.c  | 111 ++++
 .../selftests/kvm/riscv/get-reg-list.c        |  11 +-
 15 files changed, 1353 insertions(+), 307 deletions(-)
 create mode 100644 tools/arch/riscv/include/asm/csr.h
 create mode 100644 tools/arch/riscv/include/asm/vdso/processor.h
 create mode 100644 tools/testing/selftests/kvm/arch_timer.c
 create mode 100644 tools/testing/selftests/kvm/include/riscv/arch_timer.h
 create mode 100644 tools/testing/selftests/kvm/include/timer_test.h
 create mode 100644 tools/testing/selftests/kvm/lib/riscv/handlers.S
 create mode 100644 tools/testing/selftests/kvm/riscv/arch_timer.c

Haibo Xu Feb. 5, 2024, 1:10 p.m. UTC | #1

Hi Marc,

Could you help review the first 3 patches in this series?

Thanks,
Haibo

On Mon, Jan 22, 2024 at 5:45 PM Haibo Xu <haibo1.xu@intel.com> wrote:
>
> The RISC-V arch_timer selftests is used to validate Sstc timer
> functionality in a guest, which sets up periodic timer interrupts
> and check the basic interrupt status upon its receipt.
>
> This KVM selftests was ported from aarch64 arch_timer and tested
> with Linux v6.7-rc8 on a Qemu riscv64 virt machine.
>
> ---
> Changed since v4:
>   * Rebased to Linux 6.7-rc8
>   * Added new patch(2/12) to clean up the data type in struct test_args
>   * Re-ordered patch(11/11) in v4 to patch(3/12)
>   * Changed the timer_err_margin_us type from int to uint32_t
>
> Haibo Xu (11):
>   KVM: arm64: selftests: Data type cleanup for arch_timer test
>   KVM: arm64: selftests: Enable tuning of error margin in arch_timer
>     test
>   KVM: arm64: selftests: Split arch_timer test code
>   KVM: selftests: Add CONFIG_64BIT definition for the build
>   tools: riscv: Add header file csr.h
>   tools: riscv: Add header file vdso/processor.h
>   KVM: riscv: selftests: Switch to use macro from csr.h
>   KVM: riscv: selftests: Add exception handling support
>   KVM: riscv: selftests: Add guest helper to get vcpu id
>   KVM: riscv: selftests: Change vcpu_has_ext to a common function
>   KVM: riscv: selftests: Add sstc timer test
>
> Paolo Bonzini (1):
>   selftests/kvm: Fix issues with $(SPLIT_TESTS)
>
>  tools/arch/riscv/include/asm/csr.h            | 541 ++++++++++++++++++
>  tools/arch/riscv/include/asm/vdso/processor.h |  32 ++
>  tools/testing/selftests/kvm/Makefile          |  27 +-
>  .../selftests/kvm/aarch64/arch_timer.c        | 295 +---------
>  tools/testing/selftests/kvm/arch_timer.c      | 259 +++++++++
>  .../selftests/kvm/include/aarch64/processor.h |   4 -
>  .../selftests/kvm/include/kvm_util_base.h     |   9 +
>  .../selftests/kvm/include/riscv/arch_timer.h  |  71 +++
>  .../selftests/kvm/include/riscv/processor.h   |  65 ++-
>  .../testing/selftests/kvm/include/test_util.h |   2 +
>  .../selftests/kvm/include/timer_test.h        |  45 ++
>  .../selftests/kvm/lib/riscv/handlers.S        | 101 ++++
>  .../selftests/kvm/lib/riscv/processor.c       |  87 +++
>  .../testing/selftests/kvm/riscv/arch_timer.c  | 111 ++++
>  .../selftests/kvm/riscv/get-reg-list.c        |  11 +-
>  15 files changed, 1353 insertions(+), 307 deletions(-)
>  create mode 100644 tools/arch/riscv/include/asm/csr.h
>  create mode 100644 tools/arch/riscv/include/asm/vdso/processor.h
>  create mode 100644 tools/testing/selftests/kvm/arch_timer.c
>  create mode 100644 tools/testing/selftests/kvm/include/riscv/arch_timer.h
>  create mode 100644 tools/testing/selftests/kvm/include/timer_test.h
>  create mode 100644 tools/testing/selftests/kvm/lib/riscv/handlers.S
>  create mode 100644 tools/testing/selftests/kvm/riscv/arch_timer.c
>
> --
> 2.34.1
>

Marc Zyngier Feb. 5, 2024, 4:24 p.m. UTC | #2

On Mon, 05 Feb 2024 13:10:26 +0000,
Haibo Xu <xiaobo55x@gmail.com> wrote:
> 
> Hi Marc,
> 
> Could you help review the first 3 patches in this series?

For these 3 patches:

Reviewed-by: Marc Zyngier <maz@kernel.org>

Thanks,

	M.

Haibo Xu Feb. 6, 2024, 1:32 a.m. UTC | #3

On Tue, Feb 6, 2024 at 12:24 AM Marc Zyngier <maz@kernel.org> wrote:
>
> On Mon, 05 Feb 2024 13:10:26 +0000,
> Haibo Xu <xiaobo55x@gmail.com> wrote:
> >
> > Hi Marc,
> >
> > Could you help review the first 3 patches in this series?
>
> For these 3 patches:
>
> Reviewed-by: Marc Zyngier <maz@kernel.org>
>

Thanks for the review!

> Thanks,
>
>         M.
>
> --
> Without deviation from the norm, progress is not possible.

Anup Patel Feb. 12, 2024, 12:23 p.m. UTC | #4

On Mon, Jan 22, 2024 at 3:15 PM Haibo Xu <haibo1.xu@intel.com> wrote:
>
> The RISC-V arch_timer selftests is used to validate Sstc timer
> functionality in a guest, which sets up periodic timer interrupts
> and check the basic interrupt status upon its receipt.
>
> This KVM selftests was ported from aarch64 arch_timer and tested
> with Linux v6.7-rc8 on a Qemu riscv64 virt machine.
>
> ---
> Changed since v4:
>   * Rebased to Linux 6.7-rc8
>   * Added new patch(2/12) to clean up the data type in struct test_args
>   * Re-ordered patch(11/11) in v4 to patch(3/12)
>   * Changed the timer_err_margin_us type from int to uint32_t
>
> Haibo Xu (11):
>   KVM: arm64: selftests: Data type cleanup for arch_timer test
>   KVM: arm64: selftests: Enable tuning of error margin in arch_timer
>     test
>   KVM: arm64: selftests: Split arch_timer test code
>   KVM: selftests: Add CONFIG_64BIT definition for the build
>   tools: riscv: Add header file csr.h
>   tools: riscv: Add header file vdso/processor.h
>   KVM: riscv: selftests: Switch to use macro from csr.h
>   KVM: riscv: selftests: Add exception handling support
>   KVM: riscv: selftests: Add guest helper to get vcpu id
>   KVM: riscv: selftests: Change vcpu_has_ext to a common function
>   KVM: riscv: selftests: Add sstc timer test
>
> Paolo Bonzini (1):
>   selftests/kvm: Fix issues with $(SPLIT_TESTS)

Rebased on Linux-6.8-rc4 and queued this series for Linux-6.9

Thanks,
Anup

>
>  tools/arch/riscv/include/asm/csr.h            | 541 ++++++++++++++++++
>  tools/arch/riscv/include/asm/vdso/processor.h |  32 ++
>  tools/testing/selftests/kvm/Makefile          |  27 +-
>  .../selftests/kvm/aarch64/arch_timer.c        | 295 +---------
>  tools/testing/selftests/kvm/arch_timer.c      | 259 +++++++++
>  .../selftests/kvm/include/aarch64/processor.h |   4 -
>  .../selftests/kvm/include/kvm_util_base.h     |   9 +
>  .../selftests/kvm/include/riscv/arch_timer.h  |  71 +++
>  .../selftests/kvm/include/riscv/processor.h   |  65 ++-
>  .../testing/selftests/kvm/include/test_util.h |   2 +
>  .../selftests/kvm/include/timer_test.h        |  45 ++
>  .../selftests/kvm/lib/riscv/handlers.S        | 101 ++++
>  .../selftests/kvm/lib/riscv/processor.c       |  87 +++
>  .../testing/selftests/kvm/riscv/arch_timer.c  | 111 ++++
>  .../selftests/kvm/riscv/get-reg-list.c        |  11 +-
>  15 files changed, 1353 insertions(+), 307 deletions(-)
>  create mode 100644 tools/arch/riscv/include/asm/csr.h
>  create mode 100644 tools/arch/riscv/include/asm/vdso/processor.h
>  create mode 100644 tools/testing/selftests/kvm/arch_timer.c
>  create mode 100644 tools/testing/selftests/kvm/include/riscv/arch_timer.h
>  create mode 100644 tools/testing/selftests/kvm/include/timer_test.h
>  create mode 100644 tools/testing/selftests/kvm/lib/riscv/handlers.S
>  create mode 100644 tools/testing/selftests/kvm/riscv/arch_timer.c
>
> --
> 2.34.1
>

Haibo Xu Feb. 18, 2024, 6:41 a.m. UTC | #5

On Mon, Feb 12, 2024 at 8:24 PM Anup Patel <anup@brainfault.org> wrote:
>
> On Mon, Jan 22, 2024 at 3:15 PM Haibo Xu <haibo1.xu@intel.com> wrote:
> >
> > The RISC-V arch_timer selftests is used to validate Sstc timer
> > functionality in a guest, which sets up periodic timer interrupts
> > and check the basic interrupt status upon its receipt.
> >
> > This KVM selftests was ported from aarch64 arch_timer and tested
> > with Linux v6.7-rc8 on a Qemu riscv64 virt machine.
> >
> > ---
> > Changed since v4:
> >   * Rebased to Linux 6.7-rc8
> >   * Added new patch(2/12) to clean up the data type in struct test_args
> >   * Re-ordered patch(11/11) in v4 to patch(3/12)
> >   * Changed the timer_err_margin_us type from int to uint32_t
> >
> > Haibo Xu (11):
> >   KVM: arm64: selftests: Data type cleanup for arch_timer test
> >   KVM: arm64: selftests: Enable tuning of error margin in arch_timer
> >     test
> >   KVM: arm64: selftests: Split arch_timer test code
> >   KVM: selftests: Add CONFIG_64BIT definition for the build
> >   tools: riscv: Add header file csr.h
> >   tools: riscv: Add header file vdso/processor.h
> >   KVM: riscv: selftests: Switch to use macro from csr.h
> >   KVM: riscv: selftests: Add exception handling support
> >   KVM: riscv: selftests: Add guest helper to get vcpu id
> >   KVM: riscv: selftests: Change vcpu_has_ext to a common function
> >   KVM: riscv: selftests: Add sstc timer test
> >
> > Paolo Bonzini (1):
> >   selftests/kvm: Fix issues with $(SPLIT_TESTS)
>
> Rebased on Linux-6.8-rc4 and queued this series for Linux-6.9
>

Thanks!

> Thanks,
> Anup
>
> >
> >  tools/arch/riscv/include/asm/csr.h            | 541 ++++++++++++++++++
> >  tools/arch/riscv/include/asm/vdso/processor.h |  32 ++
> >  tools/testing/selftests/kvm/Makefile          |  27 +-
> >  .../selftests/kvm/aarch64/arch_timer.c        | 295 +---------
> >  tools/testing/selftests/kvm/arch_timer.c      | 259 +++++++++
> >  .../selftests/kvm/include/aarch64/processor.h |   4 -
> >  .../selftests/kvm/include/kvm_util_base.h     |   9 +
> >  .../selftests/kvm/include/riscv/arch_timer.h  |  71 +++
> >  .../selftests/kvm/include/riscv/processor.h   |  65 ++-
> >  .../testing/selftests/kvm/include/test_util.h |   2 +
> >  .../selftests/kvm/include/timer_test.h        |  45 ++
> >  .../selftests/kvm/lib/riscv/handlers.S        | 101 ++++
> >  .../selftests/kvm/lib/riscv/processor.c       |  87 +++
> >  .../testing/selftests/kvm/riscv/arch_timer.c  | 111 ++++
> >  .../selftests/kvm/riscv/get-reg-list.c        |  11 +-
> >  15 files changed, 1353 insertions(+), 307 deletions(-)
> >  create mode 100644 tools/arch/riscv/include/asm/csr.h
> >  create mode 100644 tools/arch/riscv/include/asm/vdso/processor.h
> >  create mode 100644 tools/testing/selftests/kvm/arch_timer.c
> >  create mode 100644 tools/testing/selftests/kvm/include/riscv/arch_timer.h
> >  create mode 100644 tools/testing/selftests/kvm/include/timer_test.h
> >  create mode 100644 tools/testing/selftests/kvm/lib/riscv/handlers.S
> >  create mode 100644 tools/testing/selftests/kvm/riscv/arch_timer.c
> >
> > --
> > 2.34.1
> >

[v5,00/12] RISCV: Add kvm Sstc timer selftests

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