| Message ID | 20240205144421.51195-4-prabhakar.mahadev-lad.rj@bp.renesas.com (mailing list archive) |
|---|---|
| State | Superseded |
| Delegated to: | Geert Uytterhoeven |
| Headers | show |
| Series | Renesas RZ/G2L family and RZ/G3S add missing IRQC interrupts | expand |
On 05.02.2024 16:44, Prabhakar wrote: > From: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> > > The IRQC block on RZ/G3S ("R9A08G045") SoC supports ECCRAM error > interrupts too, add those missing interrupts in the IRQC node. > > Fixes: 837918aa3fdd ("arm64: dts: renesas: r9a08g045: Add IA55 interrupt controller node") > Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Reviewed-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com> > --- > arch/arm64/boot/dts/renesas/r9a08g045.dtsi | 8 ++++++-- > 1 file changed, 6 insertions(+), 2 deletions(-) > > diff --git a/arch/arm64/boot/dts/renesas/r9a08g045.dtsi b/arch/arm64/boot/dts/renesas/r9a08g045.dtsi > index dfee878c0f49..4aaffd1753c8 100644 > --- a/arch/arm64/boot/dts/renesas/r9a08g045.dtsi > +++ b/arch/arm64/boot/dts/renesas/r9a08g045.dtsi > @@ -152,7 +152,10 @@ irqc: interrupt-controller@11050000 { > <GIC_SPI 458 IRQ_TYPE_LEVEL_HIGH>, > <GIC_SPI 459 IRQ_TYPE_LEVEL_HIGH>, > <GIC_SPI 460 IRQ_TYPE_LEVEL_HIGH>, > - <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>; > + <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>, > + <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>, > + <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>, > + <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>; > interrupt-names = "nmi", > "irq0", "irq1", "irq2", "irq3", > "irq4", "irq5", "irq6", "irq7", > @@ -164,7 +167,8 @@ irqc: interrupt-controller@11050000 { > "tint20", "tint21", "tint22", "tint23", > "tint24", "tint25", "tint26", "tint27", > "tint28", "tint29", "tint30", "tint31", > - "bus-err"; > + "bus-err", "ec7tie1-0", "ec7tie2-0", > + "ec7tiovf-0"; > clocks = <&cpg CPG_MOD R9A08G045_IA55_CLK>, > <&cpg CPG_MOD R9A08G045_IA55_PCLK>; > clock-names = "clk", "pclk";
On Mon, Feb 5, 2024 at 3:44 PM Prabhakar <prabhakar.csengg@gmail.com> wrote: > From: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> > > The IRQC block on RZ/G3S ("R9A08G045") SoC supports ECCRAM error > interrupts too, add those missing interrupts in the IRQC node. > > Fixes: 837918aa3fdd ("arm64: dts: renesas: r9a08g045: Add IA55 interrupt controller node") > Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> i.e. will queue in renesas-devel for v6.9, once the DT bindings have been accepted. Gr{oetje,eeting}s, Geert
diff --git a/arch/arm64/boot/dts/renesas/r9a08g045.dtsi b/arch/arm64/boot/dts/renesas/r9a08g045.dtsi index dfee878c0f49..4aaffd1753c8 100644 --- a/arch/arm64/boot/dts/renesas/r9a08g045.dtsi +++ b/arch/arm64/boot/dts/renesas/r9a08g045.dtsi @@ -152,7 +152,10 @@ irqc: interrupt-controller@11050000 { <GIC_SPI 458 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 459 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 460 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>; + <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>; interrupt-names = "nmi", "irq0", "irq1", "irq2", "irq3", "irq4", "irq5", "irq6", "irq7", @@ -164,7 +167,8 @@ irqc: interrupt-controller@11050000 { "tint20", "tint21", "tint22", "tint23", "tint24", "tint25", "tint26", "tint27", "tint28", "tint29", "tint30", "tint31", - "bus-err"; + "bus-err", "ec7tie1-0", "ec7tie2-0", + "ec7tiovf-0"; clocks = <&cpg CPG_MOD R9A08G045_IA55_CLK>, <&cpg CPG_MOD R9A08G045_IA55_PCLK>; clock-names = "clk", "pclk";