diff mbox series

[v4,20/20] arch: arm64: dts: meson: axg: add crypto node

Message ID 20240212135108.549755-21-avromanov@salutedevices.com (mailing list archive)
State New, archived
Headers show
Series Support more Amlogic SoC families in crypto driver | expand

Commit Message

Alexey Romanov Feb. 12, 2024, 1:51 p.m. UTC 
This patch adds a crypto node declaration. With the
Amlogic crypto driver we can use HW implementation
of SHA1/224/256 and AES algo.

Signed-off-by: Alexey Romanov <avromanov@salutedevices.com>
---
 arch/arm64/boot/dts/amlogic/meson-axg.dtsi | 6 ++++++
 1 file changed, 6 insertions(+)

Comments

Neil Armstrong Feb. 12, 2024, 5:04 p.m. UTC | #1 
On 12/02/2024 14:51, Alexey Romanov wrote:
> This patch adds a crypto node declaration. With the
> Amlogic crypto driver we can use HW implementation
> of SHA1/224/256 and AES algo.
> 
> Signed-off-by: Alexey Romanov <avromanov@salutedevices.com>
> ---
>   arch/arm64/boot/dts/amlogic/meson-axg.dtsi | 6 ++++++
>   1 file changed, 6 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/amlogic/meson-axg.dtsi b/arch/arm64/boot/dts/amlogic/meson-axg.dtsi
> index 6d12b760b90f..b19be72abdd6 100644
> --- a/arch/arm64/boot/dts/amlogic/meson-axg.dtsi
> +++ b/arch/arm64/boot/dts/amlogic/meson-axg.dtsi
> @@ -294,6 +294,12 @@ ethmac: ethernet@ff3f0000 {
>   			status = "disabled";
>   		};
>   
> +		crypto: crypto@ff63e000 {
> +			compatible = "amlogic,axg-crypto";
> +			reg = <0x0 0xff63e000 0x0 0x48>;
> +			interrupts = <GIC_SPI 180 IRQ_TYPE_EDGE_RISING>;
> +		};
> +
>   		pcie_phy: phy@ff644000 {
>   			compatible = "amlogic,axg-pcie-phy";
>   			reg = <0x0 0xff644000 0x0 0x1c>;

Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
diff mbox series

Patch

diff --git a/arch/arm64/boot/dts/amlogic/meson-axg.dtsi b/arch/arm64/boot/dts/amlogic/meson-axg.dtsi
index 6d12b760b90f..b19be72abdd6 100644
--- a/arch/arm64/boot/dts/amlogic/meson-axg.dtsi
+++ b/arch/arm64/boot/dts/amlogic/meson-axg.dtsi
@@ -294,6 +294,12 @@  ethmac: ethernet@ff3f0000 {
 			status = "disabled";
 		};
 
+		crypto: crypto@ff63e000 {
+			compatible = "amlogic,axg-crypto";
+			reg = <0x0 0xff63e000 0x0 0x48>;
+			interrupts = <GIC_SPI 180 IRQ_TYPE_EDGE_RISING>;
+		};
+
 		pcie_phy: phy@ff644000 {
 			compatible = "amlogic,axg-pcie-phy";
 			reg = <0x0 0xff644000 0x0 0x1c>;