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[2/2] linux-user/riscv: Sync hwprobe keys with Linux

Message ID 20240207115926.887816-3-christoph.muellner@vrull.eu (mailing list archive)
State New, archived
Headers show
Series linux-user/riscv: Sync hwprobe keys with kernel | expand

Commit Message

Christoph Müllner Feb. 7, 2024, 11:59 a.m. UTC 
Upstream Linux recently added many additional keys to the hwprobe API.
This patch adds support for all of them with the exception of Ztso,
which is currently not supported in QEMU.

Signed-off-by: Christoph Müllner <christoph.muellner@vrull.eu>
---
 linux-user/syscall.c | 98 ++++++++++++++++++++++++++++++++++++++++----
 1 file changed, 91 insertions(+), 7 deletions(-)

Comments

Daniel Henrique Barboza Feb. 14, 2024, 1:26 p.m. UTC | #1 
On 2/7/24 08:59, Christoph Müllner wrote:
> Upstream Linux recently added many additional keys to the hwprobe API.
> This patch adds support for all of them with the exception of Ztso,
> which is currently not supported in QEMU.
> 
> Signed-off-by: Christoph Müllner <christoph.muellner@vrull.eu>
> ---

Reviewed-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>

>   linux-user/syscall.c | 98 ++++++++++++++++++++++++++++++++++++++++----
>   1 file changed, 91 insertions(+), 7 deletions(-)
> 
> diff --git a/linux-user/syscall.c b/linux-user/syscall.c
> index 43467c9707..3ba20f99ad 100644
> --- a/linux-user/syscall.c
> +++ b/linux-user/syscall.c
> @@ -8793,13 +8793,41 @@ static int do_getdents64(abi_long dirfd, abi_long arg2, abi_long count)
>   #define     RISCV_HWPROBE_BASE_BEHAVIOR_IMA (1 << 0)
>   
>   #define RISCV_HWPROBE_KEY_IMA_EXT_0     4
> -#define     RISCV_HWPROBE_IMA_FD       (1 << 0)
> -#define     RISCV_HWPROBE_IMA_C        (1 << 1)
> -#define     RISCV_HWPROBE_IMA_V        (1 << 2)
> -#define     RISCV_HWPROBE_EXT_ZBA      (1 << 3)
> -#define     RISCV_HWPROBE_EXT_ZBB      (1 << 4)
> -#define     RISCV_HWPROBE_EXT_ZBS      (1 << 5)
> -#define     RISCV_HWPROBE_EXT_ZICBOZ   (1 << 6)
> +#define		RISCV_HWPROBE_IMA_FD		(1 << 0)
> +#define		RISCV_HWPROBE_IMA_C		(1 << 1)
> +#define		RISCV_HWPROBE_IMA_V		(1 << 2)
> +#define		RISCV_HWPROBE_EXT_ZBA		(1 << 3)
> +#define		RISCV_HWPROBE_EXT_ZBB		(1 << 4)
> +#define		RISCV_HWPROBE_EXT_ZBS		(1 << 5)
> +#define		RISCV_HWPROBE_EXT_ZICBOZ	(1 << 6)
> +#define		RISCV_HWPROBE_EXT_ZBC		(1 << 7)
> +#define		RISCV_HWPROBE_EXT_ZBKB		(1 << 8)
> +#define		RISCV_HWPROBE_EXT_ZBKC		(1 << 9)
> +#define		RISCV_HWPROBE_EXT_ZBKX		(1 << 10)
> +#define		RISCV_HWPROBE_EXT_ZKND		(1 << 11)
> +#define		RISCV_HWPROBE_EXT_ZKNE		(1 << 12)
> +#define		RISCV_HWPROBE_EXT_ZKNH		(1 << 13)
> +#define		RISCV_HWPROBE_EXT_ZKSED		(1 << 14)
> +#define		RISCV_HWPROBE_EXT_ZKSH		(1 << 15)
> +#define		RISCV_HWPROBE_EXT_ZKT		(1 << 16)
> +#define		RISCV_HWPROBE_EXT_ZVBB		(1 << 17)
> +#define		RISCV_HWPROBE_EXT_ZVBC		(1 << 18)
> +#define		RISCV_HWPROBE_EXT_ZVKB		(1 << 19)
> +#define		RISCV_HWPROBE_EXT_ZVKG		(1 << 20)
> +#define		RISCV_HWPROBE_EXT_ZVKNED	(1 << 21)
> +#define		RISCV_HWPROBE_EXT_ZVKNHA	(1 << 22)
> +#define		RISCV_HWPROBE_EXT_ZVKNHB	(1 << 23)
> +#define		RISCV_HWPROBE_EXT_ZVKSED	(1 << 24)
> +#define		RISCV_HWPROBE_EXT_ZVKSH		(1 << 25)
> +#define		RISCV_HWPROBE_EXT_ZVKT		(1 << 26)
> +#define		RISCV_HWPROBE_EXT_ZFH		(1 << 27)
> +#define		RISCV_HWPROBE_EXT_ZFHMIN	(1 << 28)
> +#define		RISCV_HWPROBE_EXT_ZIHINTNTL	(1 << 29)
> +#define		RISCV_HWPROBE_EXT_ZVFH		(1 << 30)
> +#define		RISCV_HWPROBE_EXT_ZVFHMIN	(1 << 31)
> +#define		RISCV_HWPROBE_EXT_ZFA		(1ULL << 32)
> +#define		RISCV_HWPROBE_EXT_ZACAS		(1ULL << 34)
> +#define		RISCV_HWPROBE_EXT_ZICOND	(1ULL << 35)
>   
>   #define RISCV_HWPROBE_KEY_CPUPERF_0     5
>   #define     RISCV_HWPROBE_MISALIGNED_UNKNOWN     (0 << 0)
> @@ -8860,6 +8888,62 @@ static void risc_hwprobe_fill_pairs(CPURISCVState *env,
>                        RISCV_HWPROBE_EXT_ZBS : 0;
>               value |= cfg->ext_zicboz ?
>                        RISCV_HWPROBE_EXT_ZICBOZ : 0;
> +            value |= cfg->ext_zbc ?
> +                     RISCV_HWPROBE_EXT_ZBC : 0;
> +            value |= cfg->ext_zbkb ?
> +                     RISCV_HWPROBE_EXT_ZBKB : 0;
> +            value |= cfg->ext_zbkc ?
> +                     RISCV_HWPROBE_EXT_ZBKC : 0;
> +            value |= cfg->ext_zbkx ?
> +                     RISCV_HWPROBE_EXT_ZBKX : 0;
> +            value |= cfg->ext_zknd ?
> +                     RISCV_HWPROBE_EXT_ZKND : 0;
> +            value |= cfg->ext_zkne ?
> +                     RISCV_HWPROBE_EXT_ZKNE : 0;
> +            value |= cfg->ext_zknh ?
> +                     RISCV_HWPROBE_EXT_ZKNH : 0;
> +            value |= cfg->ext_zksed ?
> +                     RISCV_HWPROBE_EXT_ZKSED : 0;
> +            value |= cfg->ext_zksh ?
> +                     RISCV_HWPROBE_EXT_ZKSH : 0;
> +            value |= cfg->ext_zkt ?
> +                     RISCV_HWPROBE_EXT_ZKT : 0;
> +            value |= cfg->ext_zvbb ?
> +                     RISCV_HWPROBE_EXT_ZVBB : 0;
> +            value |= cfg->ext_zvbc ?
> +                     RISCV_HWPROBE_EXT_ZVBC : 0;
> +            value |= cfg->ext_zvkb ?
> +                     RISCV_HWPROBE_EXT_ZVKB : 0;
> +            value |= cfg->ext_zvkg ?
> +                     RISCV_HWPROBE_EXT_ZVKG : 0;
> +            value |= cfg->ext_zvkned ?
> +                     RISCV_HWPROBE_EXT_ZVKNED : 0;
> +            value |= cfg->ext_zvknha ?
> +                     RISCV_HWPROBE_EXT_ZVKNHA : 0;
> +            value |= cfg->ext_zvknhb ?
> +                     RISCV_HWPROBE_EXT_ZVKNHB : 0;
> +            value |= cfg->ext_zvksed ?
> +                     RISCV_HWPROBE_EXT_ZVKSED : 0;
> +            value |= cfg->ext_zvksh ?
> +                     RISCV_HWPROBE_EXT_ZVKSH : 0;
> +            value |= cfg->ext_zvkt ?
> +                     RISCV_HWPROBE_EXT_ZVKT : 0;
> +            value |= cfg->ext_zfh ?
> +                     RISCV_HWPROBE_EXT_ZFH : 0;
> +            value |= cfg->ext_zfhmin ?
> +                     RISCV_HWPROBE_EXT_ZFHMIN : 0;
> +            value |= cfg->ext_zihintntl ?
> +                     RISCV_HWPROBE_EXT_ZIHINTNTL : 0;
> +            value |= cfg->ext_zvfh ?
> +                     RISCV_HWPROBE_EXT_ZVFH : 0;
> +            value |= cfg->ext_zvfhmin ?
> +                     RISCV_HWPROBE_EXT_ZVFHMIN : 0;
> +            value |= cfg->ext_zfa ?
> +                     RISCV_HWPROBE_EXT_ZFA : 0;
> +            value |= cfg->ext_zacas ?
> +                     RISCV_HWPROBE_EXT_ZACAS : 0;
> +            value |= cfg->ext_zicond ?
> +                     RISCV_HWPROBE_EXT_ZICOND : 0;
>               __put_user(value, &pair->value);
>               break;
>           case RISCV_HWPROBE_KEY_CPUPERF_0:
Alistair Francis March 8, 2024, 4:22 a.m. UTC | #2 
On Wed, Feb 7, 2024 at 10:00 PM Christoph Müllner
<christoph.muellner@vrull.eu> wrote:
>
> Upstream Linux recently added many additional keys to the hwprobe API.
> This patch adds support for all of them with the exception of Ztso,
> which is currently not supported in QEMU.
>
> Signed-off-by: Christoph Müllner <christoph.muellner@vrull.eu>
> ---
>  linux-user/syscall.c | 98 ++++++++++++++++++++++++++++++++++++++++----
>  1 file changed, 91 insertions(+), 7 deletions(-)
>
> diff --git a/linux-user/syscall.c b/linux-user/syscall.c
> index 43467c9707..3ba20f99ad 100644
> --- a/linux-user/syscall.c
> +++ b/linux-user/syscall.c
> @@ -8793,13 +8793,41 @@ static int do_getdents64(abi_long dirfd, abi_long arg2, abi_long count)
>  #define     RISCV_HWPROBE_BASE_BEHAVIOR_IMA (1 << 0)
>
>  #define RISCV_HWPROBE_KEY_IMA_EXT_0     4
> -#define     RISCV_HWPROBE_IMA_FD       (1 << 0)
> -#define     RISCV_HWPROBE_IMA_C        (1 << 1)
> -#define     RISCV_HWPROBE_IMA_V        (1 << 2)
> -#define     RISCV_HWPROBE_EXT_ZBA      (1 << 3)
> -#define     RISCV_HWPROBE_EXT_ZBB      (1 << 4)
> -#define     RISCV_HWPROBE_EXT_ZBS      (1 << 5)
> -#define     RISCV_HWPROBE_EXT_ZICBOZ   (1 << 6)
> +#define                RISCV_HWPROBE_IMA_FD            (1 << 0)
> +#define                RISCV_HWPROBE_IMA_C             (1 << 1)
> +#define                RISCV_HWPROBE_IMA_V             (1 << 2)
> +#define                RISCV_HWPROBE_EXT_ZBA           (1 << 3)
> +#define                RISCV_HWPROBE_EXT_ZBB           (1 << 4)
> +#define                RISCV_HWPROBE_EXT_ZBS           (1 << 5)
> +#define                RISCV_HWPROBE_EXT_ZICBOZ        (1 << 6)
> +#define                RISCV_HWPROBE_EXT_ZBC           (1 << 7)
> +#define                RISCV_HWPROBE_EXT_ZBKB          (1 << 8)
> +#define                RISCV_HWPROBE_EXT_ZBKC          (1 << 9)
> +#define                RISCV_HWPROBE_EXT_ZBKX          (1 << 10)
> +#define                RISCV_HWPROBE_EXT_ZKND          (1 << 11)
> +#define                RISCV_HWPROBE_EXT_ZKNE          (1 << 12)
> +#define                RISCV_HWPROBE_EXT_ZKNH          (1 << 13)
> +#define                RISCV_HWPROBE_EXT_ZKSED         (1 << 14)
> +#define                RISCV_HWPROBE_EXT_ZKSH          (1 << 15)
> +#define                RISCV_HWPROBE_EXT_ZKT           (1 << 16)
> +#define                RISCV_HWPROBE_EXT_ZVBB          (1 << 17)
> +#define                RISCV_HWPROBE_EXT_ZVBC          (1 << 18)
> +#define                RISCV_HWPROBE_EXT_ZVKB          (1 << 19)
> +#define                RISCV_HWPROBE_EXT_ZVKG          (1 << 20)
> +#define                RISCV_HWPROBE_EXT_ZVKNED        (1 << 21)
> +#define                RISCV_HWPROBE_EXT_ZVKNHA        (1 << 22)
> +#define                RISCV_HWPROBE_EXT_ZVKNHB        (1 << 23)
> +#define                RISCV_HWPROBE_EXT_ZVKSED        (1 << 24)
> +#define                RISCV_HWPROBE_EXT_ZVKSH         (1 << 25)
> +#define                RISCV_HWPROBE_EXT_ZVKT          (1 << 26)
> +#define                RISCV_HWPROBE_EXT_ZFH           (1 << 27)
> +#define                RISCV_HWPROBE_EXT_ZFHMIN        (1 << 28)
> +#define                RISCV_HWPROBE_EXT_ZIHINTNTL     (1 << 29)
> +#define                RISCV_HWPROBE_EXT_ZVFH          (1 << 30)
> +#define                RISCV_HWPROBE_EXT_ZVFHMIN       (1 << 31)
> +#define                RISCV_HWPROBE_EXT_ZFA           (1ULL << 32)
> +#define                RISCV_HWPROBE_EXT_ZACAS         (1ULL << 34)
> +#define                RISCV_HWPROBE_EXT_ZICOND        (1ULL << 35)

This fails to pass checkpatch

Alistair

>
>  #define RISCV_HWPROBE_KEY_CPUPERF_0     5
>  #define     RISCV_HWPROBE_MISALIGNED_UNKNOWN     (0 << 0)
> @@ -8860,6 +8888,62 @@ static void risc_hwprobe_fill_pairs(CPURISCVState *env,
>                       RISCV_HWPROBE_EXT_ZBS : 0;
>              value |= cfg->ext_zicboz ?
>                       RISCV_HWPROBE_EXT_ZICBOZ : 0;
> +            value |= cfg->ext_zbc ?
> +                     RISCV_HWPROBE_EXT_ZBC : 0;
> +            value |= cfg->ext_zbkb ?
> +                     RISCV_HWPROBE_EXT_ZBKB : 0;
> +            value |= cfg->ext_zbkc ?
> +                     RISCV_HWPROBE_EXT_ZBKC : 0;
> +            value |= cfg->ext_zbkx ?
> +                     RISCV_HWPROBE_EXT_ZBKX : 0;
> +            value |= cfg->ext_zknd ?
> +                     RISCV_HWPROBE_EXT_ZKND : 0;
> +            value |= cfg->ext_zkne ?
> +                     RISCV_HWPROBE_EXT_ZKNE : 0;
> +            value |= cfg->ext_zknh ?
> +                     RISCV_HWPROBE_EXT_ZKNH : 0;
> +            value |= cfg->ext_zksed ?
> +                     RISCV_HWPROBE_EXT_ZKSED : 0;
> +            value |= cfg->ext_zksh ?
> +                     RISCV_HWPROBE_EXT_ZKSH : 0;
> +            value |= cfg->ext_zkt ?
> +                     RISCV_HWPROBE_EXT_ZKT : 0;
> +            value |= cfg->ext_zvbb ?
> +                     RISCV_HWPROBE_EXT_ZVBB : 0;
> +            value |= cfg->ext_zvbc ?
> +                     RISCV_HWPROBE_EXT_ZVBC : 0;
> +            value |= cfg->ext_zvkb ?
> +                     RISCV_HWPROBE_EXT_ZVKB : 0;
> +            value |= cfg->ext_zvkg ?
> +                     RISCV_HWPROBE_EXT_ZVKG : 0;
> +            value |= cfg->ext_zvkned ?
> +                     RISCV_HWPROBE_EXT_ZVKNED : 0;
> +            value |= cfg->ext_zvknha ?
> +                     RISCV_HWPROBE_EXT_ZVKNHA : 0;
> +            value |= cfg->ext_zvknhb ?
> +                     RISCV_HWPROBE_EXT_ZVKNHB : 0;
> +            value |= cfg->ext_zvksed ?
> +                     RISCV_HWPROBE_EXT_ZVKSED : 0;
> +            value |= cfg->ext_zvksh ?
> +                     RISCV_HWPROBE_EXT_ZVKSH : 0;
> +            value |= cfg->ext_zvkt ?
> +                     RISCV_HWPROBE_EXT_ZVKT : 0;
> +            value |= cfg->ext_zfh ?
> +                     RISCV_HWPROBE_EXT_ZFH : 0;
> +            value |= cfg->ext_zfhmin ?
> +                     RISCV_HWPROBE_EXT_ZFHMIN : 0;
> +            value |= cfg->ext_zihintntl ?
> +                     RISCV_HWPROBE_EXT_ZIHINTNTL : 0;
> +            value |= cfg->ext_zvfh ?
> +                     RISCV_HWPROBE_EXT_ZVFH : 0;
> +            value |= cfg->ext_zvfhmin ?
> +                     RISCV_HWPROBE_EXT_ZVFHMIN : 0;
> +            value |= cfg->ext_zfa ?
> +                     RISCV_HWPROBE_EXT_ZFA : 0;
> +            value |= cfg->ext_zacas ?
> +                     RISCV_HWPROBE_EXT_ZACAS : 0;
> +            value |= cfg->ext_zicond ?
> +                     RISCV_HWPROBE_EXT_ZICOND : 0;
>              __put_user(value, &pair->value);
>              break;
>          case RISCV_HWPROBE_KEY_CPUPERF_0:
> --
> 2.43.0
>
>
Christoph Müllner March 8, 2024, 1:15 p.m. UTC | #3 
On Fri, Mar 8, 2024 at 5:23 AM Alistair Francis <alistair23@gmail.com> wrote:
>
> On Wed, Feb 7, 2024 at 10:00 PM Christoph Müllner
> <christoph.muellner@vrull.eu> wrote:
> >
> > Upstream Linux recently added many additional keys to the hwprobe API.
> > This patch adds support for all of them with the exception of Ztso,
> > which is currently not supported in QEMU.
> >
> > Signed-off-by: Christoph Müllner <christoph.muellner@vrull.eu>
> > ---
> >  linux-user/syscall.c | 98 ++++++++++++++++++++++++++++++++++++++++----
> >  1 file changed, 91 insertions(+), 7 deletions(-)
> >
> > diff --git a/linux-user/syscall.c b/linux-user/syscall.c
> > index 43467c9707..3ba20f99ad 100644
> > --- a/linux-user/syscall.c
> > +++ b/linux-user/syscall.c
> > @@ -8793,13 +8793,41 @@ static int do_getdents64(abi_long dirfd, abi_long arg2, abi_long count)
> >  #define     RISCV_HWPROBE_BASE_BEHAVIOR_IMA (1 << 0)
> >
> >  #define RISCV_HWPROBE_KEY_IMA_EXT_0     4
> > -#define     RISCV_HWPROBE_IMA_FD       (1 << 0)
> > -#define     RISCV_HWPROBE_IMA_C        (1 << 1)
> > -#define     RISCV_HWPROBE_IMA_V        (1 << 2)
> > -#define     RISCV_HWPROBE_EXT_ZBA      (1 << 3)
> > -#define     RISCV_HWPROBE_EXT_ZBB      (1 << 4)
> > -#define     RISCV_HWPROBE_EXT_ZBS      (1 << 5)
> > -#define     RISCV_HWPROBE_EXT_ZICBOZ   (1 << 6)
> > +#define                RISCV_HWPROBE_IMA_FD            (1 << 0)
> > +#define                RISCV_HWPROBE_IMA_C             (1 << 1)
> > +#define                RISCV_HWPROBE_IMA_V             (1 << 2)
> > +#define                RISCV_HWPROBE_EXT_ZBA           (1 << 3)
> > +#define                RISCV_HWPROBE_EXT_ZBB           (1 << 4)
> > +#define                RISCV_HWPROBE_EXT_ZBS           (1 << 5)
> > +#define                RISCV_HWPROBE_EXT_ZICBOZ        (1 << 6)
> > +#define                RISCV_HWPROBE_EXT_ZBC           (1 << 7)
> > +#define                RISCV_HWPROBE_EXT_ZBKB          (1 << 8)
> > +#define                RISCV_HWPROBE_EXT_ZBKC          (1 << 9)
> > +#define                RISCV_HWPROBE_EXT_ZBKX          (1 << 10)
> > +#define                RISCV_HWPROBE_EXT_ZKND          (1 << 11)
> > +#define                RISCV_HWPROBE_EXT_ZKNE          (1 << 12)
> > +#define                RISCV_HWPROBE_EXT_ZKNH          (1 << 13)
> > +#define                RISCV_HWPROBE_EXT_ZKSED         (1 << 14)
> > +#define                RISCV_HWPROBE_EXT_ZKSH          (1 << 15)
> > +#define                RISCV_HWPROBE_EXT_ZKT           (1 << 16)
> > +#define                RISCV_HWPROBE_EXT_ZVBB          (1 << 17)
> > +#define                RISCV_HWPROBE_EXT_ZVBC          (1 << 18)
> > +#define                RISCV_HWPROBE_EXT_ZVKB          (1 << 19)
> > +#define                RISCV_HWPROBE_EXT_ZVKG          (1 << 20)
> > +#define                RISCV_HWPROBE_EXT_ZVKNED        (1 << 21)
> > +#define                RISCV_HWPROBE_EXT_ZVKNHA        (1 << 22)
> > +#define                RISCV_HWPROBE_EXT_ZVKNHB        (1 << 23)
> > +#define                RISCV_HWPROBE_EXT_ZVKSED        (1 << 24)
> > +#define                RISCV_HWPROBE_EXT_ZVKSH         (1 << 25)
> > +#define                RISCV_HWPROBE_EXT_ZVKT          (1 << 26)
> > +#define                RISCV_HWPROBE_EXT_ZFH           (1 << 27)
> > +#define                RISCV_HWPROBE_EXT_ZFHMIN        (1 << 28)
> > +#define                RISCV_HWPROBE_EXT_ZIHINTNTL     (1 << 29)
> > +#define                RISCV_HWPROBE_EXT_ZVFH          (1 << 30)
> > +#define                RISCV_HWPROBE_EXT_ZVFHMIN       (1 << 31)
> > +#define                RISCV_HWPROBE_EXT_ZFA           (1ULL << 32)
> > +#define                RISCV_HWPROBE_EXT_ZACAS         (1ULL << 34)
> > +#define                RISCV_HWPROBE_EXT_ZICOND        (1ULL << 35)
>
> This fails to pass checkpatch

I copied 1:1 from the kernel, so I guess it is the tabs.
Sorry for this! And as you have already fixed that: thanks!

>
> Alistair
>
> >
> >  #define RISCV_HWPROBE_KEY_CPUPERF_0     5
> >  #define     RISCV_HWPROBE_MISALIGNED_UNKNOWN     (0 << 0)
> > @@ -8860,6 +8888,62 @@ static void risc_hwprobe_fill_pairs(CPURISCVState *env,
> >                       RISCV_HWPROBE_EXT_ZBS : 0;
> >              value |= cfg->ext_zicboz ?
> >                       RISCV_HWPROBE_EXT_ZICBOZ : 0;
> > +            value |= cfg->ext_zbc ?
> > +                     RISCV_HWPROBE_EXT_ZBC : 0;
> > +            value |= cfg->ext_zbkb ?
> > +                     RISCV_HWPROBE_EXT_ZBKB : 0;
> > +            value |= cfg->ext_zbkc ?
> > +                     RISCV_HWPROBE_EXT_ZBKC : 0;
> > +            value |= cfg->ext_zbkx ?
> > +                     RISCV_HWPROBE_EXT_ZBKX : 0;
> > +            value |= cfg->ext_zknd ?
> > +                     RISCV_HWPROBE_EXT_ZKND : 0;
> > +            value |= cfg->ext_zkne ?
> > +                     RISCV_HWPROBE_EXT_ZKNE : 0;
> > +            value |= cfg->ext_zknh ?
> > +                     RISCV_HWPROBE_EXT_ZKNH : 0;
> > +            value |= cfg->ext_zksed ?
> > +                     RISCV_HWPROBE_EXT_ZKSED : 0;
> > +            value |= cfg->ext_zksh ?
> > +                     RISCV_HWPROBE_EXT_ZKSH : 0;
> > +            value |= cfg->ext_zkt ?
> > +                     RISCV_HWPROBE_EXT_ZKT : 0;
> > +            value |= cfg->ext_zvbb ?
> > +                     RISCV_HWPROBE_EXT_ZVBB : 0;
> > +            value |= cfg->ext_zvbc ?
> > +                     RISCV_HWPROBE_EXT_ZVBC : 0;
> > +            value |= cfg->ext_zvkb ?
> > +                     RISCV_HWPROBE_EXT_ZVKB : 0;
> > +            value |= cfg->ext_zvkg ?
> > +                     RISCV_HWPROBE_EXT_ZVKG : 0;
> > +            value |= cfg->ext_zvkned ?
> > +                     RISCV_HWPROBE_EXT_ZVKNED : 0;
> > +            value |= cfg->ext_zvknha ?
> > +                     RISCV_HWPROBE_EXT_ZVKNHA : 0;
> > +            value |= cfg->ext_zvknhb ?
> > +                     RISCV_HWPROBE_EXT_ZVKNHB : 0;
> > +            value |= cfg->ext_zvksed ?
> > +                     RISCV_HWPROBE_EXT_ZVKSED : 0;
> > +            value |= cfg->ext_zvksh ?
> > +                     RISCV_HWPROBE_EXT_ZVKSH : 0;
> > +            value |= cfg->ext_zvkt ?
> > +                     RISCV_HWPROBE_EXT_ZVKT : 0;
> > +            value |= cfg->ext_zfh ?
> > +                     RISCV_HWPROBE_EXT_ZFH : 0;
> > +            value |= cfg->ext_zfhmin ?
> > +                     RISCV_HWPROBE_EXT_ZFHMIN : 0;
> > +            value |= cfg->ext_zihintntl ?
> > +                     RISCV_HWPROBE_EXT_ZIHINTNTL : 0;
> > +            value |= cfg->ext_zvfh ?
> > +                     RISCV_HWPROBE_EXT_ZVFH : 0;
> > +            value |= cfg->ext_zvfhmin ?
> > +                     RISCV_HWPROBE_EXT_ZVFHMIN : 0;
> > +            value |= cfg->ext_zfa ?
> > +                     RISCV_HWPROBE_EXT_ZFA : 0;
> > +            value |= cfg->ext_zacas ?
> > +                     RISCV_HWPROBE_EXT_ZACAS : 0;
> > +            value |= cfg->ext_zicond ?
> > +                     RISCV_HWPROBE_EXT_ZICOND : 0;
> >              __put_user(value, &pair->value);
> >              break;
> >          case RISCV_HWPROBE_KEY_CPUPERF_0:
> > --
> > 2.43.0
> >
> >
diff mbox series

Patch

diff --git a/linux-user/syscall.c b/linux-user/syscall.c
index 43467c9707..3ba20f99ad 100644
--- a/linux-user/syscall.c
+++ b/linux-user/syscall.c
@@ -8793,13 +8793,41 @@  static int do_getdents64(abi_long dirfd, abi_long arg2, abi_long count)
 #define     RISCV_HWPROBE_BASE_BEHAVIOR_IMA (1 << 0)
 
 #define RISCV_HWPROBE_KEY_IMA_EXT_0     4
-#define     RISCV_HWPROBE_IMA_FD       (1 << 0)
-#define     RISCV_HWPROBE_IMA_C        (1 << 1)
-#define     RISCV_HWPROBE_IMA_V        (1 << 2)
-#define     RISCV_HWPROBE_EXT_ZBA      (1 << 3)
-#define     RISCV_HWPROBE_EXT_ZBB      (1 << 4)
-#define     RISCV_HWPROBE_EXT_ZBS      (1 << 5)
-#define     RISCV_HWPROBE_EXT_ZICBOZ   (1 << 6)
+#define		RISCV_HWPROBE_IMA_FD		(1 << 0)
+#define		RISCV_HWPROBE_IMA_C		(1 << 1)
+#define		RISCV_HWPROBE_IMA_V		(1 << 2)
+#define		RISCV_HWPROBE_EXT_ZBA		(1 << 3)
+#define		RISCV_HWPROBE_EXT_ZBB		(1 << 4)
+#define		RISCV_HWPROBE_EXT_ZBS		(1 << 5)
+#define		RISCV_HWPROBE_EXT_ZICBOZ	(1 << 6)
+#define		RISCV_HWPROBE_EXT_ZBC		(1 << 7)
+#define		RISCV_HWPROBE_EXT_ZBKB		(1 << 8)
+#define		RISCV_HWPROBE_EXT_ZBKC		(1 << 9)
+#define		RISCV_HWPROBE_EXT_ZBKX		(1 << 10)
+#define		RISCV_HWPROBE_EXT_ZKND		(1 << 11)
+#define		RISCV_HWPROBE_EXT_ZKNE		(1 << 12)
+#define		RISCV_HWPROBE_EXT_ZKNH		(1 << 13)
+#define		RISCV_HWPROBE_EXT_ZKSED		(1 << 14)
+#define		RISCV_HWPROBE_EXT_ZKSH		(1 << 15)
+#define		RISCV_HWPROBE_EXT_ZKT		(1 << 16)
+#define		RISCV_HWPROBE_EXT_ZVBB		(1 << 17)
+#define		RISCV_HWPROBE_EXT_ZVBC		(1 << 18)
+#define		RISCV_HWPROBE_EXT_ZVKB		(1 << 19)
+#define		RISCV_HWPROBE_EXT_ZVKG		(1 << 20)
+#define		RISCV_HWPROBE_EXT_ZVKNED	(1 << 21)
+#define		RISCV_HWPROBE_EXT_ZVKNHA	(1 << 22)
+#define		RISCV_HWPROBE_EXT_ZVKNHB	(1 << 23)
+#define		RISCV_HWPROBE_EXT_ZVKSED	(1 << 24)
+#define		RISCV_HWPROBE_EXT_ZVKSH		(1 << 25)
+#define		RISCV_HWPROBE_EXT_ZVKT		(1 << 26)
+#define		RISCV_HWPROBE_EXT_ZFH		(1 << 27)
+#define		RISCV_HWPROBE_EXT_ZFHMIN	(1 << 28)
+#define		RISCV_HWPROBE_EXT_ZIHINTNTL	(1 << 29)
+#define		RISCV_HWPROBE_EXT_ZVFH		(1 << 30)
+#define		RISCV_HWPROBE_EXT_ZVFHMIN	(1 << 31)
+#define		RISCV_HWPROBE_EXT_ZFA		(1ULL << 32)
+#define		RISCV_HWPROBE_EXT_ZACAS		(1ULL << 34)
+#define		RISCV_HWPROBE_EXT_ZICOND	(1ULL << 35)
 
 #define RISCV_HWPROBE_KEY_CPUPERF_0     5
 #define     RISCV_HWPROBE_MISALIGNED_UNKNOWN     (0 << 0)
@@ -8860,6 +8888,62 @@  static void risc_hwprobe_fill_pairs(CPURISCVState *env,
                      RISCV_HWPROBE_EXT_ZBS : 0;
             value |= cfg->ext_zicboz ?
                      RISCV_HWPROBE_EXT_ZICBOZ : 0;
+            value |= cfg->ext_zbc ?
+                     RISCV_HWPROBE_EXT_ZBC : 0;
+            value |= cfg->ext_zbkb ?
+                     RISCV_HWPROBE_EXT_ZBKB : 0;
+            value |= cfg->ext_zbkc ?
+                     RISCV_HWPROBE_EXT_ZBKC : 0;
+            value |= cfg->ext_zbkx ?
+                     RISCV_HWPROBE_EXT_ZBKX : 0;
+            value |= cfg->ext_zknd ?
+                     RISCV_HWPROBE_EXT_ZKND : 0;
+            value |= cfg->ext_zkne ?
+                     RISCV_HWPROBE_EXT_ZKNE : 0;
+            value |= cfg->ext_zknh ?
+                     RISCV_HWPROBE_EXT_ZKNH : 0;
+            value |= cfg->ext_zksed ?
+                     RISCV_HWPROBE_EXT_ZKSED : 0;
+            value |= cfg->ext_zksh ?
+                     RISCV_HWPROBE_EXT_ZKSH : 0;
+            value |= cfg->ext_zkt ?
+                     RISCV_HWPROBE_EXT_ZKT : 0;
+            value |= cfg->ext_zvbb ?
+                     RISCV_HWPROBE_EXT_ZVBB : 0;
+            value |= cfg->ext_zvbc ?
+                     RISCV_HWPROBE_EXT_ZVBC : 0;
+            value |= cfg->ext_zvkb ?
+                     RISCV_HWPROBE_EXT_ZVKB : 0;
+            value |= cfg->ext_zvkg ?
+                     RISCV_HWPROBE_EXT_ZVKG : 0;
+            value |= cfg->ext_zvkned ?
+                     RISCV_HWPROBE_EXT_ZVKNED : 0;
+            value |= cfg->ext_zvknha ?
+                     RISCV_HWPROBE_EXT_ZVKNHA : 0;
+            value |= cfg->ext_zvknhb ?
+                     RISCV_HWPROBE_EXT_ZVKNHB : 0;
+            value |= cfg->ext_zvksed ?
+                     RISCV_HWPROBE_EXT_ZVKSED : 0;
+            value |= cfg->ext_zvksh ?
+                     RISCV_HWPROBE_EXT_ZVKSH : 0;
+            value |= cfg->ext_zvkt ?
+                     RISCV_HWPROBE_EXT_ZVKT : 0;
+            value |= cfg->ext_zfh ?
+                     RISCV_HWPROBE_EXT_ZFH : 0;
+            value |= cfg->ext_zfhmin ?
+                     RISCV_HWPROBE_EXT_ZFHMIN : 0;
+            value |= cfg->ext_zihintntl ?
+                     RISCV_HWPROBE_EXT_ZIHINTNTL : 0;
+            value |= cfg->ext_zvfh ?
+                     RISCV_HWPROBE_EXT_ZVFH : 0;
+            value |= cfg->ext_zvfhmin ?
+                     RISCV_HWPROBE_EXT_ZVFHMIN : 0;
+            value |= cfg->ext_zfa ?
+                     RISCV_HWPROBE_EXT_ZFA : 0;
+            value |= cfg->ext_zacas ?
+                     RISCV_HWPROBE_EXT_ZACAS : 0;
+            value |= cfg->ext_zicond ?
+                     RISCV_HWPROBE_EXT_ZICOND : 0;
             __put_user(value, &pair->value);
             break;
         case RISCV_HWPROBE_KEY_CPUPERF_0: