Message ID | 20240208124300.2740313-9-claudiu.beznea.uj@bp.renesas.com (mailing list archive) |
---|---|
State | Superseded |
Delegated to: | Geert Uytterhoeven |
Headers | show |
Series | clk: renesas: rzg2l: Add support for power domains | expand |
Hi Claudiu, On Thu, Feb 8, 2024 at 1:44 PM Claudiu <claudiu.beznea@tuxon.dev> wrote: > From: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com> > > Instantiate always-on power domain for R9A07G043 SoC. At the moment, all > the IPs are part of this domain. > > Signed-off-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com> Thanks for your patch! As not all IPs are part of the always-on domain, I'd rather defer this until all domains are handled in the driver. Gr{oetje,eeting}s, Geert -- Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org In personal conversations with technical people, I call myself a hacker. But when I'm talking to journalists I just say "programmer" or something like that. -- Linus Torvalds
On 16.02.2024 16:09, Geert Uytterhoeven wrote: > Hi Claudiu, > > On Thu, Feb 8, 2024 at 1:44 PM Claudiu <claudiu.beznea@tuxon.dev> wrote: >> From: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com> >> >> Instantiate always-on power domain for R9A07G043 SoC. At the moment, all >> the IPs are part of this domain. >> >> Signed-off-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com> > > Thanks for your patch! > > As not all IPs are part of the always-on domain, I'd rather defer this > until all domains are handled in the driver. ok > > Gr{oetje,eeting}s, > > Geert > > > -- > Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org > > In personal conversations with technical people, I call myself a hacker. But > when I'm talking to journalists I just say "programmer" or something like that. > -- Linus Torvalds
diff --git a/drivers/clk/renesas/r9a07g043-cpg.c b/drivers/clk/renesas/r9a07g043-cpg.c index acfb06cad441..3a7fddd1fa61 100644 --- a/drivers/clk/renesas/r9a07g043-cpg.c +++ b/drivers/clk/renesas/r9a07g043-cpg.c @@ -358,6 +358,11 @@ static const unsigned int r9a07g043_no_pm_mod_clks[] = { }; #endif +static const struct rzg2l_cpg_pm_domain_init_data r9a07g043_pm_domains[] = { + DEF_PD("always-on", R9A07G043_PD_ALWAYS_ON, 0, 0, + RZG2L_PD_F_PARENT | RZG2L_PD_F_ALWAYS_ON), +}; + const struct rzg2l_cpg_info r9a07g043_cpg_info = { /* Core Clocks */ .core_clks = r9a07g043_core_clks, @@ -392,5 +397,9 @@ const struct rzg2l_cpg_info r9a07g043_cpg_info = { .num_resets = R9A07G043_IAX45_RESETN + 1, /* Last reset ID + 1 */ #endif + /* Power domains. */ + .pm_domains = r9a07g043_pm_domains, + .num_pm_domains = ARRAY_SIZE(r9a07g043_pm_domains), + .has_clk_mon_regs = true, };