Message ID | 07a72378ca64b44341af960f042a6efd41d10dc3.1708354355.git.geert+renesas@glider.be (mailing list archive) |
---|---|
State | Awaiting Upstream, archived |
Headers | show |
Series | clk: renesas: r8a779h0: Add RPC-IF clock | expand |
On Mon, Feb 19, 2024 at 03:54:09PM +0100, Geert Uytterhoeven wrote: > From: Cong Dang <cong.dang.xn@renesas.com> > > Add the module clock used by the SPI Multi I/O Bus Controller (RPC-IF) > on the Renesas R-Car V4M (R8A779H0) SoC. > > Signed-off-by: Cong Dang <cong.dang.xn@renesas.com> > Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
diff --git a/drivers/clk/renesas/r8a779h0-cpg-mssr.c b/drivers/clk/renesas/r8a779h0-cpg-mssr.c index 92359306dc0df544..71f67a1c86d80f4c 100644 --- a/drivers/clk/renesas/r8a779h0-cpg-mssr.c +++ b/drivers/clk/renesas/r8a779h0-cpg-mssr.c @@ -184,6 +184,7 @@ static const struct mssr_mod_clk r8a779h0_mod_clks[] = { DEF_MOD("i2c1", 519, R8A779H0_CLK_S0D6_PER), DEF_MOD("i2c2", 520, R8A779H0_CLK_S0D6_PER), DEF_MOD("i2c3", 521, R8A779H0_CLK_S0D6_PER), + DEF_MOD("rpc-if", 629, R8A779H0_CLK_RPCD2), DEF_MOD("sdhi0", 706, R8A779H0_CLK_SD0), DEF_MOD("sydm1", 709, R8A779H0_CLK_S0D6_PER), DEF_MOD("sydm2", 710, R8A779H0_CLK_S0D6_PER),