diff mbox series

amd_pstate: fix erroneous highest_perf value on some CPUs

Message ID 20240221172404.99765-2-lucasleeeeeeeee@gmail.com (mailing list archive)
State Handled Elsewhere, archived
Headers show
Series amd_pstate: fix erroneous highest_perf value on some CPUs | expand

Commit Message

Lucas Lee Jing Yi Feb. 21, 2024, 5:19 p.m. UTC
On a Ryzen 7840HS the highest_perf value is 196, not 166 as AMD assumed.
This leads to the advertised max clock speed to only be 4.35ghz
instead of 5.14ghz leading to a large degradation in performance.

Fix the broken assumption and revert back to the old logic for
getting highest_perf.

TEST:
Geekbench 6 Before Patch:
Single Core:	2325 (-22%)!
Multi Core:	11335 (-10%)

Geekbench 6 AFTER Patch:
Single Core:	2635
Multi Core:	12487

Signed-off-by: Lucas Lee Jing Yi <lucasleeeeeeeee@gmail.com>
---
 drivers/cpufreq/amd-pstate.c | 22 ++++++++++------------
 1 file changed, 10 insertions(+), 12 deletions(-)

Comments

Mario Limonciello Feb. 21, 2024, 6:47 p.m. UTC | #1
On 2/21/2024 11:19, Lucas Lee Jing Yi wrote:
> On a Ryzen 7840HS the highest_perf value is 196, not 166 as AMD assumed.
> This leads to the advertised max clock speed to only be 4.35ghz
> instead of 5.14ghz leading to a large degradation in performance.
> 
> Fix the broken assumption and revert back to the old logic for
> getting highest_perf.
> 
> TEST:
> Geekbench 6 Before Patch:
> Single Core:	2325 (-22%)!
> Multi Core:	11335 (-10%)
> 
> Geekbench 6 AFTER Patch:
> Single Core:	2635
> Multi Core:	12487
> 

Yes; the max boost for your system should be 5.1GHz according to the 
specification [1].

Would you please open a kernel Bugzilla and attach an acpidump and dmesg 
for your system?  I believe we need to better understand your system's 
situation before deciding on how to correctly approach it.

[1] https://www.amd.com/en/product/13041

> Signed-off-by: Lucas Lee Jing Yi <lucasleeeeeeeee@gmail.com>
> ---
>   drivers/cpufreq/amd-pstate.c | 22 ++++++++++------------
>   1 file changed, 10 insertions(+), 12 deletions(-)
> 
> diff --git a/drivers/cpufreq/amd-pstate.c b/drivers/cpufreq/amd-pstate.c
> index 08e112444c27..54df68773620 100644
> --- a/drivers/cpufreq/amd-pstate.c
> +++ b/drivers/cpufreq/amd-pstate.c
> @@ -50,7 +50,6 @@
>   
>   #define AMD_PSTATE_TRANSITION_LATENCY	20000
>   #define AMD_PSTATE_TRANSITION_DELAY	1000
> -#define AMD_PSTATE_PREFCORE_THRESHOLD	166
>   
>   /*
>    * TODO: We need more time to fine tune processors with shared memory solution
> @@ -299,15 +298,12 @@ static int pstate_init_perf(struct amd_cpudata *cpudata)
>   				     &cap1);
>   	if (ret)
>   		return ret;
> -
> -	/* For platforms that do not support the preferred core feature, the
> -	 * highest_pef may be configured with 166 or 255, to avoid max frequency
> -	 * calculated wrongly. we take the AMD_CPPC_HIGHEST_PERF(cap1) value as
> -	 * the default max perf.
> +
> +	/* Some CPUs have different highest_perf from others, it is safer
> +	 * to read it than to assume some erroneous value, leading to performance issues.
>   	 */
> -	if (cpudata->hw_prefcore)
> -		highest_perf = AMD_PSTATE_PREFCORE_THRESHOLD;
> -	else
> +	highest_perf = amd_get_highest_perf();
> +	if (highest_perf > AMD_CPPC_HIGHEST_PERF(cap1))
>   		highest_perf = AMD_CPPC_HIGHEST_PERF(cap1);
>   
>   	WRITE_ONCE(cpudata->highest_perf, highest_perf);
> @@ -329,9 +325,11 @@ static int cppc_init_perf(struct amd_cpudata *cpudata)
>   	if (ret)
>   		return ret;
>   
> -	if (cpudata->hw_prefcore)
> -		highest_perf = AMD_PSTATE_PREFCORE_THRESHOLD;
> -	else
> +	/* Some CPUs have different highest_perf from others, it is safer
> +	 * to read it than to assume some erroneous value, leading to performance issues.
> +	 */
> +	highest_perf = amd_get_highest_perf();
> +	if (highest_perf > cppc_perf.highest_perf)
>   		highest_perf = cppc_perf.highest_perf;
>   
>   	WRITE_ONCE(cpudata->highest_perf, highest_perf);
diff mbox series

Patch

diff --git a/drivers/cpufreq/amd-pstate.c b/drivers/cpufreq/amd-pstate.c
index 08e112444c27..54df68773620 100644
--- a/drivers/cpufreq/amd-pstate.c
+++ b/drivers/cpufreq/amd-pstate.c
@@ -50,7 +50,6 @@ 
 
 #define AMD_PSTATE_TRANSITION_LATENCY	20000
 #define AMD_PSTATE_TRANSITION_DELAY	1000
-#define AMD_PSTATE_PREFCORE_THRESHOLD	166
 
 /*
  * TODO: We need more time to fine tune processors with shared memory solution
@@ -299,15 +298,12 @@  static int pstate_init_perf(struct amd_cpudata *cpudata)
 				     &cap1);
 	if (ret)
 		return ret;
-
-	/* For platforms that do not support the preferred core feature, the
-	 * highest_pef may be configured with 166 or 255, to avoid max frequency
-	 * calculated wrongly. we take the AMD_CPPC_HIGHEST_PERF(cap1) value as
-	 * the default max perf.
+
+	/* Some CPUs have different highest_perf from others, it is safer
+	 * to read it than to assume some erroneous value, leading to performance issues.
 	 */
-	if (cpudata->hw_prefcore)
-		highest_perf = AMD_PSTATE_PREFCORE_THRESHOLD;
-	else
+	highest_perf = amd_get_highest_perf();
+	if (highest_perf > AMD_CPPC_HIGHEST_PERF(cap1))
 		highest_perf = AMD_CPPC_HIGHEST_PERF(cap1);
 
 	WRITE_ONCE(cpudata->highest_perf, highest_perf);
@@ -329,9 +325,11 @@  static int cppc_init_perf(struct amd_cpudata *cpudata)
 	if (ret)
 		return ret;
 
-	if (cpudata->hw_prefcore)
-		highest_perf = AMD_PSTATE_PREFCORE_THRESHOLD;
-	else
+	/* Some CPUs have different highest_perf from others, it is safer
+	 * to read it than to assume some erroneous value, leading to performance issues.
+	 */
+	highest_perf = amd_get_highest_perf();
+	if (highest_perf > cppc_perf.highest_perf)
 		highest_perf = cppc_perf.highest_perf;
 
 	WRITE_ONCE(cpudata->highest_perf, highest_perf);