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+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/net/hisilicon,hisi-femac-mdio.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: HiSilicon FEMAC MDIO bus
+
+maintainers:
+ - Yang Xiwen <forbidden405@formail.com>
+
+allOf:
+ - $ref: mdio.yaml#
+
+properties:
+ compatible:
+ const: hisilicon,hisi-femac-mdio
+
+ reg:
+ maxItems: 1
+
+ clocks:
+ maxItems: 1
+
+required:
+ - compatible
+ - reg
+ - clocks
+
+unevaluatedProperties: false
+
+examples:
+ - |
+ mdio@10091100 {
+ compatible = "hisilicon,hisi-femac-mdio";
+ reg = <0x10091100 0x20>;
+ clocks = <&clk_mdio>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ phy@1 {
+ reg = <1>;
+ };
+ };
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-Hisilicon Fast Ethernet MDIO Controller interface
-
-Required properties:
-- compatible: should be "hisilicon,hisi-femac-mdio".
-- reg: address and length of the register set for the device.
-- clocks: A phandle to the reference clock for this device.
-
-- PHY subnode: inherits from phy binding [1]
-[1] Documentation/devicetree/bindings/net/phy.txt
-
-Example:
-mdio: mdio@10091100 {
- compatible = "hisilicon,hisi-femac-mdio";
- reg = <0x10091100 0x10>;
- clocks = <&crg HI3516CV300_MDIO_CLK>;
- #address-cells = <1>;
- #size-cells = <0>;
-
- phy0: phy@1 {
- reg = <1>;
- };
-};