diff mbox series

[4/4] riscv: Allow NOMMU kernels to run in S-mode

Message ID 20240227003630.3634533-5-samuel.holland@sifive.com (mailing list archive)
State Accepted
Commit f862bbf4cdca696ef3073c5cf3d340b778a3e42a
Headers show
Series riscv: 64-bit NOMMU fixes and enhancements | expand

Checks

Context Check Description
conchuod/vmtest-for-next-PR success PR summary
conchuod/patch-4-test-1 success .github/scripts/patches/tests/build_rv32_defconfig.sh
conchuod/patch-4-test-2 success .github/scripts/patches/tests/build_rv64_clang_allmodconfig.sh
conchuod/patch-4-test-3 success .github/scripts/patches/tests/build_rv64_gcc_allmodconfig.sh
conchuod/patch-4-test-4 success .github/scripts/patches/tests/build_rv64_nommu_k210_defconfig.sh
conchuod/patch-4-test-5 success .github/scripts/patches/tests/build_rv64_nommu_virt_defconfig.sh
conchuod/patch-4-test-6 success .github/scripts/patches/tests/checkpatch.sh
conchuod/patch-4-test-7 success .github/scripts/patches/tests/dtb_warn_rv64.sh
conchuod/patch-4-test-8 success .github/scripts/patches/tests/header_inline.sh
conchuod/patch-4-test-9 success .github/scripts/patches/tests/kdoc.sh
conchuod/patch-4-test-10 success .github/scripts/patches/tests/module_param.sh
conchuod/patch-4-test-11 success .github/scripts/patches/tests/verify_fixes.sh
conchuod/patch-4-test-12 success .github/scripts/patches/tests/verify_signedoff.sh

Commit Message

Samuel Holland Feb. 27, 2024, 12:34 a.m. UTC
For ease of testing, it is convenient to run NOMMU kernels in supervisor
mode. The only required change is to offset the kernel load address,
since the beginning of RAM is usually reserved for M-mode firmware.

Signed-off-by: Samuel Holland <samuel.holland@sifive.com>
---

 arch/riscv/Kconfig | 15 ++++++++++-----
 1 file changed, 10 insertions(+), 5 deletions(-)

Comments

Conor Dooley Feb. 27, 2024, 12:24 p.m. UTC | #1
On Mon, Feb 26, 2024 at 04:34:49PM -0800, Samuel Holland wrote:
> For ease of testing, it is convenient to run NOMMU kernels in supervisor
> mode. The only required change is to offset the kernel load address,
> since the beginning of RAM is usually reserved for M-mode firmware.
> 
> Signed-off-by: Samuel Holland <samuel.holland@sifive.com>
> ---
> 
>  arch/riscv/Kconfig | 15 ++++++++++-----
>  1 file changed, 10 insertions(+), 5 deletions(-)
> 
> diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig
> index ef53c00470d6..0dc09b2ac2f6 100644
> --- a/arch/riscv/Kconfig
> +++ b/arch/riscv/Kconfig
> @@ -64,7 +64,7 @@ config RISCV
>  	select ARCH_WANTS_THP_SWAP if HAVE_ARCH_TRANSPARENT_HUGEPAGE
>  	select BINFMT_FLAT_NO_DATA_START_OFFSET if !MMU
>  	select BUILDTIME_TABLE_SORT if MMU
> -	select CLINT_TIMER if !MMU
> +	select CLINT_TIMER if RISCV_M_MODE
>  	select CLONE_BACKWARDS
>  	select COMMON_CLK
>  	select CPU_PM if CPU_IDLE || HIBERNATION || SUSPEND
> @@ -220,8 +220,12 @@ config ARCH_MMAP_RND_COMPAT_BITS_MAX
>  
>  # set if we run in machine mode, cleared if we run in supervisor mode
>  config RISCV_M_MODE
> -	bool
> -	default !MMU
> +	bool "Build a kernel that runs in machine mode"
> +	depends on !MMU
> +	default y
> +	help
> +	  Select this option if you want to run the kernel in M-mode,
> +	  without the assistance of any other firmware.
>  
>  # set if we are running in S-mode and can use SBI calls
>  config RISCV_SBI
> @@ -238,8 +242,9 @@ config MMU
>  
>  config PAGE_OFFSET
>  	hex
> -	default 0xC0000000 if 32BIT && MMU
> -	default 0x80000000 if !MMU
> +	default 0x80000000 if !MMU && RISCV_M_MODE
> +	default 0x80200000 if !MMU
> +	default 0xc0000000 if 32BIT
>  	default 0xff60000000000000 if 64BIT

The first default seen with a passing condition is the default chosen,
right?

Cheers,
Conor.
Samuel Holland Feb. 27, 2024, 7:02 p.m. UTC | #2
Hi Conor,

On 2024-02-27 6:24 AM, Conor Dooley wrote:
> On Mon, Feb 26, 2024 at 04:34:49PM -0800, Samuel Holland wrote:
>> For ease of testing, it is convenient to run NOMMU kernels in supervisor
>> mode. The only required change is to offset the kernel load address,
>> since the beginning of RAM is usually reserved for M-mode firmware.
>>
>> Signed-off-by: Samuel Holland <samuel.holland@sifive.com>
>> ---
>>
>>  arch/riscv/Kconfig | 15 ++++++++++-----
>>  1 file changed, 10 insertions(+), 5 deletions(-)
>>
>> diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig
>> index ef53c00470d6..0dc09b2ac2f6 100644
>> --- a/arch/riscv/Kconfig
>> +++ b/arch/riscv/Kconfig
>> @@ -64,7 +64,7 @@ config RISCV
>>  	select ARCH_WANTS_THP_SWAP if HAVE_ARCH_TRANSPARENT_HUGEPAGE
>>  	select BINFMT_FLAT_NO_DATA_START_OFFSET if !MMU
>>  	select BUILDTIME_TABLE_SORT if MMU
>> -	select CLINT_TIMER if !MMU
>> +	select CLINT_TIMER if RISCV_M_MODE
>>  	select CLONE_BACKWARDS
>>  	select COMMON_CLK
>>  	select CPU_PM if CPU_IDLE || HIBERNATION || SUSPEND
>> @@ -220,8 +220,12 @@ config ARCH_MMAP_RND_COMPAT_BITS_MAX
>>  
>>  # set if we run in machine mode, cleared if we run in supervisor mode
>>  config RISCV_M_MODE
>> -	bool
>> -	default !MMU
>> +	bool "Build a kernel that runs in machine mode"
>> +	depends on !MMU
>> +	default y
>> +	help
>> +	  Select this option if you want to run the kernel in M-mode,
>> +	  without the assistance of any other firmware.
>>  
>>  # set if we are running in S-mode and can use SBI calls
>>  config RISCV_SBI
>> @@ -238,8 +242,9 @@ config MMU
>>  
>>  config PAGE_OFFSET
>>  	hex
>> -	default 0xC0000000 if 32BIT && MMU
>> -	default 0x80000000 if !MMU
>> +	default 0x80000000 if !MMU && RISCV_M_MODE
>> +	default 0x80200000 if !MMU
>> +	default 0xc0000000 if 32BIT
>>  	default 0xff60000000000000 if 64BIT
> 
> The first default seen with a passing condition is the default chosen,
> right?

Yes, exactly. It's not required for the conditions to all be disjoint.

Regards,
Samuel
Conor Dooley Feb. 28, 2024, 3:21 p.m. UTC | #3
On Tue, Feb 27, 2024 at 01:02:11PM -0600, Samuel Holland wrote:
> Hi Conor,
> 
> On 2024-02-27 6:24 AM, Conor Dooley wrote:
> > On Mon, Feb 26, 2024 at 04:34:49PM -0800, Samuel Holland wrote:
> >> For ease of testing, it is convenient to run NOMMU kernels in supervisor
> >> mode. The only required change is to offset the kernel load address,
> >> since the beginning of RAM is usually reserved for M-mode firmware.
> >>
> >> Signed-off-by: Samuel Holland <samuel.holland@sifive.com>
> >> ---
> >>
> >>  arch/riscv/Kconfig | 15 ++++++++++-----
> >>  1 file changed, 10 insertions(+), 5 deletions(-)
> >>
> >> diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig
> >> index ef53c00470d6..0dc09b2ac2f6 100644
> >> --- a/arch/riscv/Kconfig
> >> +++ b/arch/riscv/Kconfig
> >> @@ -64,7 +64,7 @@ config RISCV
> >>  	select ARCH_WANTS_THP_SWAP if HAVE_ARCH_TRANSPARENT_HUGEPAGE
> >>  	select BINFMT_FLAT_NO_DATA_START_OFFSET if !MMU
> >>  	select BUILDTIME_TABLE_SORT if MMU
> >> -	select CLINT_TIMER if !MMU
> >> +	select CLINT_TIMER if RISCV_M_MODE
> >>  	select CLONE_BACKWARDS
> >>  	select COMMON_CLK
> >>  	select CPU_PM if CPU_IDLE || HIBERNATION || SUSPEND
> >> @@ -220,8 +220,12 @@ config ARCH_MMAP_RND_COMPAT_BITS_MAX
> >>  
> >>  # set if we run in machine mode, cleared if we run in supervisor mode
> >>  config RISCV_M_MODE
> >> -	bool
> >> -	default !MMU
> >> +	bool "Build a kernel that runs in machine mode"
> >> +	depends on !MMU
> >> +	default y
> >> +	help
> >> +	  Select this option if you want to run the kernel in M-mode,
> >> +	  without the assistance of any other firmware.
> >>  
> >>  # set if we are running in S-mode and can use SBI calls
> >>  config RISCV_SBI
> >> @@ -238,8 +242,9 @@ config MMU
> >>  
> >>  config PAGE_OFFSET
> >>  	hex
> >> -	default 0xC0000000 if 32BIT && MMU
> >> -	default 0x80000000 if !MMU
> >> +	default 0x80000000 if !MMU && RISCV_M_MODE
> >> +	default 0x80200000 if !MMU
> >> +	default 0xc0000000 if 32BIT
> >>  	default 0xff60000000000000 if 64BIT
> > 
> > The first default seen with a passing condition is the default chosen,
> > right?
> 
> Yes, exactly. It's not required for the conditions to all be disjoint.

I had actually gone and checked was doing the right thing, but I didn't
manage to convince myself that this was intended behaviour rather than
an implementation detail. What I saw in the docs for default was:
"If multiple default values are visible, only the first defined one is active"
and I suppose "visible" is what is used to cover the if part.

Reviewed-by: Conor Dooley <conor.dooley@microchip.com>

Cheers,
Conor.
diff mbox series

Patch

diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig
index ef53c00470d6..0dc09b2ac2f6 100644
--- a/arch/riscv/Kconfig
+++ b/arch/riscv/Kconfig
@@ -64,7 +64,7 @@  config RISCV
 	select ARCH_WANTS_THP_SWAP if HAVE_ARCH_TRANSPARENT_HUGEPAGE
 	select BINFMT_FLAT_NO_DATA_START_OFFSET if !MMU
 	select BUILDTIME_TABLE_SORT if MMU
-	select CLINT_TIMER if !MMU
+	select CLINT_TIMER if RISCV_M_MODE
 	select CLONE_BACKWARDS
 	select COMMON_CLK
 	select CPU_PM if CPU_IDLE || HIBERNATION || SUSPEND
@@ -220,8 +220,12 @@  config ARCH_MMAP_RND_COMPAT_BITS_MAX
 
 # set if we run in machine mode, cleared if we run in supervisor mode
 config RISCV_M_MODE
-	bool
-	default !MMU
+	bool "Build a kernel that runs in machine mode"
+	depends on !MMU
+	default y
+	help
+	  Select this option if you want to run the kernel in M-mode,
+	  without the assistance of any other firmware.
 
 # set if we are running in S-mode and can use SBI calls
 config RISCV_SBI
@@ -238,8 +242,9 @@  config MMU
 
 config PAGE_OFFSET
 	hex
-	default 0xC0000000 if 32BIT && MMU
-	default 0x80000000 if !MMU
+	default 0x80000000 if !MMU && RISCV_M_MODE
+	default 0x80200000 if !MMU
+	default 0xc0000000 if 32BIT
 	default 0xff60000000000000 if 64BIT
 
 config KASAN_SHADOW_OFFSET