| Message ID | 20240228172452.2456842-3-robimarko@gmail.com (mailing list archive) |
|---|---|
| State | Accepted |
| Commit | cb28f702960695e26597c332b0e46776e825cc34 |
| Delegated to: | Netdev Maintainers |
| Headers | show |
| Series | net: phy: qcom: qca808x: fill in possible_interfaces | expand |
On Wed, Feb 28, 2024 at 06:24:10PM +0100, Robert Marko wrote: > Currently QCA808x driver does not fill the possible_interfaces. > 2.5G QCA808x support SGMII and 2500Base-X while 1G model only supports > SGMII, so fill the possible_interfaces accordingly. > > Signed-off-by: Robert Marko <robimarko@gmail.com> Reviewed-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk> Thanks!
diff --git a/drivers/net/phy/qcom/qca808x.c b/drivers/net/phy/qcom/qca808x.c index a4c61a8e07c3..5048304ccc9e 100644 --- a/drivers/net/phy/qcom/qca808x.c +++ b/drivers/net/phy/qcom/qca808x.c @@ -167,6 +167,16 @@ static bool qca808x_is_1g_only(struct phy_device *phydev) return !!(QCA808X_PHY_CHIP_TYPE_1G & ret); } +static void qca808x_fill_possible_interfaces(struct phy_device *phydev) +{ + unsigned long *possible = phydev->possible_interfaces; + + __set_bit(PHY_INTERFACE_MODE_SGMII, possible); + + if (!qca808x_is_1g_only(phydev)) + __set_bit(PHY_INTERFACE_MODE_2500BASEX, possible); +} + static int qca808x_probe(struct phy_device *phydev) { struct device *dev = &phydev->mdio.dev; @@ -231,6 +241,8 @@ static int qca808x_config_init(struct phy_device *phydev) } } + qca808x_fill_possible_interfaces(phydev); + /* Configure adc threshold as 100mv for the link 10M */ return at803x_debug_reg_mask(phydev, QCA808X_PHY_DEBUG_ADC_THRESHOLD, QCA808X_ADC_THRESHOLD_MASK,
Currently QCA808x driver does not fill the possible_interfaces. 2.5G QCA808x support SGMII and 2500Base-X while 1G model only supports SGMII, so fill the possible_interfaces accordingly. Signed-off-by: Robert Marko <robimarko@gmail.com> --- drivers/net/phy/qcom/qca808x.c | 12 ++++++++++++ 1 file changed, 12 insertions(+)