| Message ID | ca51cb007d06e8fc0dce613749dbe44b5116ac98.1709768157.git.lorenzo@kernel.org (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | arm64: Add support for Airoha EN7581 Soc | expand |
Il 07/03/24 01:11, Lorenzo Bianconi ha scritto: > From: Daniel Danzberger <dd@embedd.com> > > Introduce the Airoha EN7581 SoC's dtsi and the Airoha EN7581 Evaluation > Board's dts file, as well as the required Makefiles. > > Signed-off-by: Daniel Danzberger <dd@embedd.com> > Co-developed-by: Lorenzo Bianconi <lorenzo@kernel.org> > Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org> > --- > arch/arm64/boot/dts/Makefile | 1 + > arch/arm64/boot/dts/airoha/Makefile | 2 + > arch/arm64/boot/dts/airoha/en7581-evb.dts | 26 ++++ > arch/arm64/boot/dts/airoha/en7581.dtsi | 154 ++++++++++++++++++++++ > 4 files changed, 183 insertions(+) > create mode 100644 arch/arm64/boot/dts/airoha/Makefile > create mode 100644 arch/arm64/boot/dts/airoha/en7581-evb.dts > create mode 100644 arch/arm64/boot/dts/airoha/en7581.dtsi > > diff --git a/arch/arm64/boot/dts/Makefile b/arch/arm64/boot/dts/Makefile > index 30dd6347a929..21cd3a87f385 100644 > --- a/arch/arm64/boot/dts/Makefile > +++ b/arch/arm64/boot/dts/Makefile > @@ -1,5 +1,6 @@ > # SPDX-License-Identifier: GPL-2.0 > subdir-y += actions > +subdir-y += airoha > subdir-y += allwinner > subdir-y += altera > subdir-y += amazon > diff --git a/arch/arm64/boot/dts/airoha/Makefile b/arch/arm64/boot/dts/airoha/Makefile > new file mode 100644 > index 000000000000..ebea112ce1d7 > --- /dev/null > +++ b/arch/arm64/boot/dts/airoha/Makefile > @@ -0,0 +1,2 @@ > +# SPDX-License-Identifier: GPL-2.0-only > +dtb-$(CONFIG_ARCH_AIROHA) += en7581-evb.dtb > diff --git a/arch/arm64/boot/dts/airoha/en7581-evb.dts b/arch/arm64/boot/dts/airoha/en7581-evb.dts > new file mode 100644 > index 000000000000..cf58e43dd5b2 > --- /dev/null > +++ b/arch/arm64/boot/dts/airoha/en7581-evb.dts > @@ -0,0 +1,26 @@ > +// SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > +/dts-v1/; > + > +/* Bootloader installs ATF here */ > +/memreserve/ 0x80000000 0x200000; > + > +#include "en7581.dtsi" > + > +/ { > + model = "Airoha EN7581 Evaluation Board"; > + compatible = "airoha,en7581-evb", "airoha,en7581"; > + > + aliases { > + serial0 = &uart1; > + }; > + > + chosen { > + stdout-path = "serial0:115200n8"; > + linux,usable-memory-range = <0x0 0x80200000 0x0 0x1fe00000>; > + }; > + > + memory@80000000 { > + device_type = "memory"; > + reg = <0x0 0x80000000 0x2 0x00000000>; > + }; > +}; > diff --git a/arch/arm64/boot/dts/airoha/en7581.dtsi b/arch/arm64/boot/dts/airoha/en7581.dtsi > new file mode 100644 > index 000000000000..732080cf6f2b > --- /dev/null > +++ b/arch/arm64/boot/dts/airoha/en7581.dtsi > @@ -0,0 +1,154 @@ > +// SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > + > +#include <dt-bindings/interrupt-controller/irq.h> > +#include <dt-bindings/interrupt-controller/arm-gic.h> > + > +/ { > + interrupt-parent = <&gic>; > + #address-cells = <2>; > + #size-cells = <2>; > + > + reserved-memory { > + #address-cells = <2>; > + #size-cells = <2>; > + ranges; > + > + npu-binary@84000000 { > + no-map; > + reg = <0x0 0x84000000 0x0 0xA00000>; > + }; > + > + npu-flag@84B0000 { > + no-map; > + reg = <0x0 0x84B00000 0x0 0x100000>; > + }; > + > + npu-pkt@85000000 { > + no-map; > + reg = <0x0 0x85000000 0x0 0x1A00000>; > + }; > + > + npu-phyaddr@86B00000 { > + no-map; > + reg = <0x0 0x86B00000 0x0 0x100000>; > + }; > + > + npu-rxdesc@86D00000 { > + no-map; > + reg = <0x0 0x86D00000 0x0 0x100000>; Lower case hex please. Here and everywhere else. Otherwise, Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Cheers, Angelo
diff --git a/arch/arm64/boot/dts/Makefile b/arch/arm64/boot/dts/Makefile index 30dd6347a929..21cd3a87f385 100644 --- a/arch/arm64/boot/dts/Makefile +++ b/arch/arm64/boot/dts/Makefile @@ -1,5 +1,6 @@ # SPDX-License-Identifier: GPL-2.0 subdir-y += actions +subdir-y += airoha subdir-y += allwinner subdir-y += altera subdir-y += amazon diff --git a/arch/arm64/boot/dts/airoha/Makefile b/arch/arm64/boot/dts/airoha/Makefile new file mode 100644 index 000000000000..ebea112ce1d7 --- /dev/null +++ b/arch/arm64/boot/dts/airoha/Makefile @@ -0,0 +1,2 @@ +# SPDX-License-Identifier: GPL-2.0-only +dtb-$(CONFIG_ARCH_AIROHA) += en7581-evb.dtb diff --git a/arch/arm64/boot/dts/airoha/en7581-evb.dts b/arch/arm64/boot/dts/airoha/en7581-evb.dts new file mode 100644 index 000000000000..cf58e43dd5b2 --- /dev/null +++ b/arch/arm64/boot/dts/airoha/en7581-evb.dts @@ -0,0 +1,26 @@ +// SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +/dts-v1/; + +/* Bootloader installs ATF here */ +/memreserve/ 0x80000000 0x200000; + +#include "en7581.dtsi" + +/ { + model = "Airoha EN7581 Evaluation Board"; + compatible = "airoha,en7581-evb", "airoha,en7581"; + + aliases { + serial0 = &uart1; + }; + + chosen { + stdout-path = "serial0:115200n8"; + linux,usable-memory-range = <0x0 0x80200000 0x0 0x1fe00000>; + }; + + memory@80000000 { + device_type = "memory"; + reg = <0x0 0x80000000 0x2 0x00000000>; + }; +}; diff --git a/arch/arm64/boot/dts/airoha/en7581.dtsi b/arch/arm64/boot/dts/airoha/en7581.dtsi new file mode 100644 index 000000000000..732080cf6f2b --- /dev/null +++ b/arch/arm64/boot/dts/airoha/en7581.dtsi @@ -0,0 +1,154 @@ +// SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) + +#include <dt-bindings/interrupt-controller/irq.h> +#include <dt-bindings/interrupt-controller/arm-gic.h> + +/ { + interrupt-parent = <&gic>; + #address-cells = <2>; + #size-cells = <2>; + + reserved-memory { + #address-cells = <2>; + #size-cells = <2>; + ranges; + + npu-binary@84000000 { + no-map; + reg = <0x0 0x84000000 0x0 0xA00000>; + }; + + npu-flag@84B0000 { + no-map; + reg = <0x0 0x84B00000 0x0 0x100000>; + }; + + npu-pkt@85000000 { + no-map; + reg = <0x0 0x85000000 0x0 0x1A00000>; + }; + + npu-phyaddr@86B00000 { + no-map; + reg = <0x0 0x86B00000 0x0 0x100000>; + }; + + npu-rxdesc@86D00000 { + no-map; + reg = <0x0 0x86D00000 0x0 0x100000>; + }; + }; + + psci { + compatible = "arm,psci-1.0"; + method = "smc"; + }; + + cpus { + #address-cells = <1>; + #size-cells = <0>; + + cpu-map { + cluster0 { + core0 { + cpu = <&cpu0>; + }; + + core1 { + cpu = <&cpu1>; + }; + + core2 { + cpu = <&cpu2>; + }; + + core3 { + cpu = <&cpu3>; + }; + }; + }; + + cpu0: cpu@0 { + device_type = "cpu"; + compatible = "arm,cortex-a53"; + reg = <0x0>; + enable-method = "psci"; + clock-frequency = <80000000>; + next-level-cache = <&l2>; + }; + + cpu1: cpu@1 { + device_type = "cpu"; + compatible = "arm,cortex-a53"; + reg = <0x1>; + enable-method = "psci"; + clock-frequency = <80000000>; + next-level-cache = <&l2>; + }; + + cpu2: cpu@2 { + device_type = "cpu"; + compatible = "arm,cortex-a53"; + reg = <0x2>; + enable-method = "psci"; + clock-frequency = <80000000>; + next-level-cache = <&l2>; + }; + + cpu3: cpu@3 { + device_type = "cpu"; + compatible = "arm,cortex-a53"; + reg = <0x3>; + enable-method = "psci"; + clock-frequency = <80000000>; + next-level-cache = <&l2>; + }; + + l2: l2-cache { + compatible = "cache"; + cache-size = <0x80000>; + cache-line-size = <64>; + cache-level = <2>; + cache-unified; + }; + }; + + timer { + compatible = "arm,armv8-timer"; + interrupt-parent = <&gic>; + interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_LOW>, + <GIC_PPI 14 IRQ_TYPE_LEVEL_LOW>, + <GIC_PPI 11 IRQ_TYPE_LEVEL_LOW>, + <GIC_PPI 10 IRQ_TYPE_LEVEL_LOW>; + }; + + soc { + compatible = "simple-bus"; + #address-cells = <2>; + #size-cells = <2>; + ranges; + + gic: interrupt-controller@9000000 { + compatible = "arm,gic-v3"; + interrupt-controller; + #interrupt-cells = <3>; + #address-cells = <1>; + #size-cells = <1>; + reg = <0x0 0x09000000 0x0 0x20000>, + <0x0 0x09080000 0x0 0x80000>, + <0x0 0x09400000 0x0 0x2000>, + <0x0 0x09500000 0x0 0x2000>, + <0x0 0x09600000 0x0 0x20000>; + interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_LOW>; + }; + + uart1: serial@1fbf0000 { + compatible = "ns16550"; + reg = <0x0 0x1fbf0000 0x0 0x30>; + reg-io-width = <4>; + reg-shift = <2>; + interrupts = <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>; + clock-frequency = <1843200>; + }; + }; +};