diff mbox series

[2/5] clk: qcom: apss-ipq-pll: use an 1-D array for Huayra pll register offsets

Message ID 20240318-apss-ipq-pll-cleanup-v1-2-52f795429d5d@gmail.com (mailing list archive)
State Changes Requested, archived
Headers show
Series clk: qcom: apss-ipq-pll: various cleanups | expand

Commit Message

Gabor Juhos March 18, 2024, 11:19 a.m. UTC
The 'ipq_pll_offsets' is defined as a two-dimensional array, but it
contains a sole element only so convert it to an one-dimensional
array. Also, rename the variable to better reflect that it is used
for the Huayra PLLs.

No functional changes.

Signed-off-by: Gabor Juhos <j4g8y7@gmail.com>
---
 drivers/clk/qcom/apss-ipq-pll.c | 22 ++++++++++------------
 1 file changed, 10 insertions(+), 12 deletions(-)

Comments

Dmitry Baryshkov March 18, 2024, 2:16 p.m. UTC | #1
On Mon, 18 Mar 2024 at 13:20, Gabor Juhos <j4g8y7@gmail.com> wrote:
>
> The 'ipq_pll_offsets' is defined as a two-dimensional array, but it
> contains a sole element only so convert it to an one-dimensional
> array. Also, rename the variable to better reflect that it is used
> for the Huayra PLLs.
>
> No functional changes.
>
> Signed-off-by: Gabor Juhos <j4g8y7@gmail.com>
> ---
>  drivers/clk/qcom/apss-ipq-pll.c | 22 ++++++++++------------
>  1 file changed, 10 insertions(+), 12 deletions(-)
>
> diff --git a/drivers/clk/qcom/apss-ipq-pll.c b/drivers/clk/qcom/apss-ipq-pll.c
> index ed3e6405f99cb..f5c7eaf8db374 100644
> --- a/drivers/clk/qcom/apss-ipq-pll.c
> +++ b/drivers/clk/qcom/apss-ipq-pll.c
> @@ -13,22 +13,20 @@
>   * are different from the one mentioned in the clk-alpha-pll.c, since the
>   * PLL is specific to APSS, so lets the define the same.
>   */
> -static const u8 ipq_pll_offsets[][PLL_OFF_MAX_REGS] = {
> -       [CLK_ALPHA_PLL_TYPE_HUAYRA] =  {
> -               [PLL_OFF_L_VAL] = 0x08,
> -               [PLL_OFF_ALPHA_VAL] = 0x10,
> -               [PLL_OFF_USER_CTL] = 0x18,
> -               [PLL_OFF_CONFIG_CTL] = 0x20,
> -               [PLL_OFF_CONFIG_CTL_U] = 0x24,
> -               [PLL_OFF_STATUS] = 0x28,
> -               [PLL_OFF_TEST_CTL] = 0x30,
> -               [PLL_OFF_TEST_CTL_U] = 0x34,
> -       },
> +static const u8 ipq_pll_huayra_regs[PLL_OFF_MAX_REGS] = {
> +       [PLL_OFF_L_VAL] = 0x08,
> +       [PLL_OFF_ALPHA_VAL] = 0x10,
> +       [PLL_OFF_USER_CTL] = 0x18,
> +       [PLL_OFF_CONFIG_CTL] = 0x20,
> +       [PLL_OFF_CONFIG_CTL_U] = 0x24,
> +       [PLL_OFF_STATUS] = 0x28,
> +       [PLL_OFF_TEST_CTL] = 0x30,
> +       [PLL_OFF_TEST_CTL_U] = 0x34,
>  };

Can you please move this to clk_alpha_pll? We can then drop it from
clk-cbf-8996.c too.

>
>  static struct clk_alpha_pll ipq_pll_huayra = {
>         .offset = 0x0,
> -       .regs = ipq_pll_offsets[CLK_ALPHA_PLL_TYPE_HUAYRA],
> +       .regs = ipq_pll_huayra_regs,
>         .flags = SUPPORTS_DYNAMIC_UPDATE,
>         .clkr = {
>                 .enable_reg = 0x0,
>
> --
> 2.44.0
>
>
Gabor Juhos March 18, 2024, 9:23 p.m. UTC | #2
2024. 03. 18. 15:16 keltezéssel, Dmitry Baryshkov írta:

...

>> +static const u8 ipq_pll_huayra_regs[PLL_OFF_MAX_REGS] = {
>> +       [PLL_OFF_L_VAL] = 0x08,
>> +       [PLL_OFF_ALPHA_VAL] = 0x10,
>> +       [PLL_OFF_USER_CTL] = 0x18,
>> +       [PLL_OFF_CONFIG_CTL] = 0x20,
>> +       [PLL_OFF_CONFIG_CTL_U] = 0x24,
>> +       [PLL_OFF_STATUS] = 0x28,
>> +       [PLL_OFF_TEST_CTL] = 0x30,
>> +       [PLL_OFF_TEST_CTL_U] = 0x34,
>>  };
> 
> Can you please move this to clk_alpha_pll? We can then drop it from
> clk-cbf-8996.c too.

Sure, I can do that. By any chance, do you have a suggestion for the name of the
new enum value to be used in the clk_alpha_pll_regs array?

CLK_ALPHA_PLL_TYPE_HUAYRA_IPQ seems too generic, and it would be a bit
misleading using that for MSM8996 CBF.

CLK_ALPHA_PLL_TYPE_HUAYRA_IPQ6018_A53 is quite long and it is also misleading.

Maybe we could use CLK_ALPHA_PLL_TYPE_IPQ6018_A53 which is short and unique
enough and we could add an alias for that like CLK_ALPHA_PLL_TYPE_MSM8996_CBF or
something similar.

Regards,
Gabor
Dmitry Baryshkov March 19, 2024, 12:09 a.m. UTC | #3
On Mon, 18 Mar 2024 at 23:23, Gabor Juhos <j4g8y7@gmail.com> wrote:
>
> 2024. 03. 18. 15:16 keltezéssel, Dmitry Baryshkov írta:
>
> ...
>
> >> +static const u8 ipq_pll_huayra_regs[PLL_OFF_MAX_REGS] = {
> >> +       [PLL_OFF_L_VAL] = 0x08,
> >> +       [PLL_OFF_ALPHA_VAL] = 0x10,
> >> +       [PLL_OFF_USER_CTL] = 0x18,
> >> +       [PLL_OFF_CONFIG_CTL] = 0x20,
> >> +       [PLL_OFF_CONFIG_CTL_U] = 0x24,
> >> +       [PLL_OFF_STATUS] = 0x28,
> >> +       [PLL_OFF_TEST_CTL] = 0x30,
> >> +       [PLL_OFF_TEST_CTL_U] = 0x34,
> >>  };
> >
> > Can you please move this to clk_alpha_pll? We can then drop it from
> > clk-cbf-8996.c too.
>
> Sure, I can do that. By any chance, do you have a suggestion for the name of the
> new enum value to be used in the clk_alpha_pll_regs array?
>
> CLK_ALPHA_PLL_TYPE_HUAYRA_IPQ seems too generic, and it would be a bit
> misleading using that for MSM8996 CBF.
>
> CLK_ALPHA_PLL_TYPE_HUAYRA_IPQ6018_A53 is quite long and it is also misleading.
>
> Maybe we could use CLK_ALPHA_PLL_TYPE_IPQ6018_A53 which is short and unique
> enough and we could add an alias for that like CLK_ALPHA_PLL_TYPE_MSM8996_CBF or
> something similar.

HUAYRA_APSS ?

>
> Regards,
> Gabor
>
Gabor Juhos March 19, 2024, 9:51 a.m. UTC | #4
2024. 03. 19. 1:09 keltezéssel, Dmitry Baryshkov írta:
> On Mon, 18 Mar 2024 at 23:23, Gabor Juhos <j4g8y7@gmail.com> wrote:
>>
>> 2024. 03. 18. 15:16 keltezéssel, Dmitry Baryshkov írta:
>>
>> ...
>>
>>>> +static const u8 ipq_pll_huayra_regs[PLL_OFF_MAX_REGS] = {
>>>> +       [PLL_OFF_L_VAL] = 0x08,
>>>> +       [PLL_OFF_ALPHA_VAL] = 0x10,
>>>> +       [PLL_OFF_USER_CTL] = 0x18,
>>>> +       [PLL_OFF_CONFIG_CTL] = 0x20,
>>>> +       [PLL_OFF_CONFIG_CTL_U] = 0x24,
>>>> +       [PLL_OFF_STATUS] = 0x28,
>>>> +       [PLL_OFF_TEST_CTL] = 0x30,
>>>> +       [PLL_OFF_TEST_CTL_U] = 0x34,
>>>>  };
>>>
>>> Can you please move this to clk_alpha_pll? We can then drop it from
>>> clk-cbf-8996.c too.
>>
>> Sure, I can do that. By any chance, do you have a suggestion for the name of the
>> new enum value to be used in the clk_alpha_pll_regs array?
>>
>> CLK_ALPHA_PLL_TYPE_HUAYRA_IPQ seems too generic, and it would be a bit
>> misleading using that for MSM8996 CBF.
>>
>> CLK_ALPHA_PLL_TYPE_HUAYRA_IPQ6018_A53 is quite long and it is also misleading.
>>
>> Maybe we could use CLK_ALPHA_PLL_TYPE_IPQ6018_A53 which is short and unique
>> enough and we could add an alias for that like CLK_ALPHA_PLL_TYPE_MSM8996_CBF or
>> something similar.
> 
> HUAYRA_APSS ?

Ok, sounds good.
diff mbox series

Patch

diff --git a/drivers/clk/qcom/apss-ipq-pll.c b/drivers/clk/qcom/apss-ipq-pll.c
index ed3e6405f99cb..f5c7eaf8db374 100644
--- a/drivers/clk/qcom/apss-ipq-pll.c
+++ b/drivers/clk/qcom/apss-ipq-pll.c
@@ -13,22 +13,20 @@ 
  * are different from the one mentioned in the clk-alpha-pll.c, since the
  * PLL is specific to APSS, so lets the define the same.
  */
-static const u8 ipq_pll_offsets[][PLL_OFF_MAX_REGS] = {
-	[CLK_ALPHA_PLL_TYPE_HUAYRA] =  {
-		[PLL_OFF_L_VAL] = 0x08,
-		[PLL_OFF_ALPHA_VAL] = 0x10,
-		[PLL_OFF_USER_CTL] = 0x18,
-		[PLL_OFF_CONFIG_CTL] = 0x20,
-		[PLL_OFF_CONFIG_CTL_U] = 0x24,
-		[PLL_OFF_STATUS] = 0x28,
-		[PLL_OFF_TEST_CTL] = 0x30,
-		[PLL_OFF_TEST_CTL_U] = 0x34,
-	},
+static const u8 ipq_pll_huayra_regs[PLL_OFF_MAX_REGS] = {
+	[PLL_OFF_L_VAL] = 0x08,
+	[PLL_OFF_ALPHA_VAL] = 0x10,
+	[PLL_OFF_USER_CTL] = 0x18,
+	[PLL_OFF_CONFIG_CTL] = 0x20,
+	[PLL_OFF_CONFIG_CTL_U] = 0x24,
+	[PLL_OFF_STATUS] = 0x28,
+	[PLL_OFF_TEST_CTL] = 0x30,
+	[PLL_OFF_TEST_CTL_U] = 0x34,
 };
 
 static struct clk_alpha_pll ipq_pll_huayra = {
 	.offset = 0x0,
-	.regs = ipq_pll_offsets[CLK_ALPHA_PLL_TYPE_HUAYRA],
+	.regs = ipq_pll_huayra_regs,
 	.flags = SUPPORTS_DYNAMIC_UPDATE,
 	.clkr = {
 		.enable_reg = 0x0,