[v3,0/1] Introduce Icelake-Server-v7 to enable TSX

Message ID	20240320093138.80267-1-zhenzhong.duan@intel.com (mailing list archive)
Headers	show Return-Path: <qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org> From: Zhenzhong Duan <zhenzhong.duan@intel.com> To: qemu-devel@nongnu.org Cc: pbonzini@redhat.com, xiaoyao.li@intel.com, xiangfeix.ma@intel.com, chao.p.peng@intel.com, Zhenzhong Duan <zhenzhong.duan@intel.com> Subject: [PATCH v3 0/1] Introduce Icelake-Server-v7 to enable TSX Date: Wed, 20 Mar 2024 17:31:37 +0800 Message-Id: <20240320093138.80267-1-zhenzhong.duan@intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Received-SPF: pass client-ip=192.198.163.11; envelope-from=zhenzhong.duan@intel.com; helo=mgamail.intel.com X-Spam_score_int: -24 X-Spam_score: -2.5 X-Spam_bar: -- X-Spam_report: (-2.5 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.422, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action Precedence: list Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org
Series	Introduce Icelake-Server-v7 to enable TSX \| expand [v3,0/1] Introduce Icelake-Server-v7 to enable TSX [v3,1/1] target/i386: Introduce Icelake-Server-v7 to enable TSX

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20240320093138.80267-1-zhenzhong.duan@intel.com (mailing list archive)

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From: Zhenzhong Duan <zhenzhong.duan@intel.com>
To: qemu-devel@nongnu.org
Cc: pbonzini@redhat.com, xiaoyao.li@intel.com, xiangfeix.ma@intel.com,
 chao.p.peng@intel.com, Zhenzhong Duan <zhenzhong.duan@intel.com>
Subject: [PATCH v3 0/1] Introduce Icelake-Server-v7 to enable TSX
Date: Wed, 20 Mar 2024 17:31:37 +0800
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Series

Introduce Icelake-Server-v7 to enable TSX | expand

Message

Duan, Zhenzhong March 20, 2024, 9:31 a.m. UTC

Hi,

This is a new effort trying to enable TSX in Icelake model.

Currently Icelake-Server-v3 and above has TSX disabled but taa-no enabled.
This is a invalid config as taa-no hints TSX exist and is invulnerable.
When start L2 guest with both L1/L2 using Icelake-Server-v3 or above,
QEMU reports below warning:

"warning: host doesn't support requested feature: MSR(10AH).taa-no [bit 8]"


Different from v2 patch https://www.mail-archive.com/qemu-devel@nongnu.org/msg907730.html
This patch add a new version Icelake-Server-v7, so the compatility of old
version is guaranteed.

Comments welcome!

Thanks
Zhenzhong

Zhenzhong Duan (1):
  target/i386: Introduce Icelake-Server-v7 to enable TSX

 target/i386/cpu.c | 10 ++++++++++
 1 file changed, 10 insertions(+)