| Message ID | LV3P220MB1202C9E9B0C5CE022F78CA5DA02D2@LV3P220MB1202.NAMP220.PROD.OUTLOOK.COM (mailing list archive) |
|---|---|
| Headers | show |
| Series | ptp: clockmatrix: support 32-bit address space | expand |
Mon, Mar 18, 2024 at 06:32:08PM CET, lnimi@hotmail.com wrote: >From: Min Li <min.li.xe@renesas.com> > >The main porpose of this series is [PATCH 1/5], which is to support read/write >to the whole 32-bit address space. Other changes are increamental since >[PATCH 1/5]. net-next is closed, send again next week. > > >Min Li (5): > ptp: clockmatrix: support 32-bit address space > ptp: clockmatrix: set write phase timer to 0 when not in PCW mode > ptp: clockmatrix: dco input-to-output delay is 20 FOD cycles + 8ns > ptp: clockmatrix: Fix caps.max_adj to reflect > DPLL_MAX_FREQ_OFFSET[MAX_FFO] > ptp: clockmatrix: move register and firmware related definition to > idt8a340_reg.h > > drivers/ptp/ptp_clockmatrix.c | 120 ++++-- > drivers/ptp/ptp_clockmatrix.h | 66 +-- > include/linux/mfd/idt8a340_reg.h | 664 ++++++++++++++++++------------- > 3 files changed, 482 insertions(+), 368 deletions(-) > >-- >2.39.2 > >
Tue, Mar 19, 2024 at 11:26:32AM CET, jiri@resnulli.us wrote: >Mon, Mar 18, 2024 at 06:32:08PM CET, lnimi@hotmail.com wrote: >>From: Min Li <min.li.xe@renesas.com> >> >>The main porpose of this series is [PATCH 1/5], which is to support read/write >>to the whole 32-bit address space. Other changes are increamental since >>[PATCH 1/5]. > >net-next is closed, send again next week. Ah, different tree. Sorry. > >> >> >>Min Li (5): >> ptp: clockmatrix: support 32-bit address space >> ptp: clockmatrix: set write phase timer to 0 when not in PCW mode >> ptp: clockmatrix: dco input-to-output delay is 20 FOD cycles + 8ns >> ptp: clockmatrix: Fix caps.max_adj to reflect >> DPLL_MAX_FREQ_OFFSET[MAX_FFO] >> ptp: clockmatrix: move register and firmware related definition to >> idt8a340_reg.h >> >> drivers/ptp/ptp_clockmatrix.c | 120 ++++-- >> drivers/ptp/ptp_clockmatrix.h | 66 +-- >> include/linux/mfd/idt8a340_reg.h | 664 ++++++++++++++++++------------- >> 3 files changed, 482 insertions(+), 368 deletions(-) >> >>-- >>2.39.2 >> >>
On Mon, 18 Mar 2024, Min Li wrote: > From: Min Li <min.li.xe@renesas.com> > > The main porpose of this series is [PATCH 1/5], which is to support read/write > to the whole 32-bit address space. Other changes are increamental since > [PATCH 1/5]. > > > Min Li (5): > ptp: clockmatrix: support 32-bit address space > ptp: clockmatrix: set write phase timer to 0 when not in PCW mode > ptp: clockmatrix: dco input-to-output delay is 20 FOD cycles + 8ns > ptp: clockmatrix: Fix caps.max_adj to reflect > DPLL_MAX_FREQ_OFFSET[MAX_FFO] > ptp: clockmatrix: move register and firmware related definition to > idt8a340_reg.h > > drivers/ptp/ptp_clockmatrix.c | 120 ++++-- > drivers/ptp/ptp_clockmatrix.h | 66 +-- > include/linux/mfd/idt8a340_reg.h | 664 ++++++++++++++++++------------- Acked-by: Lee Jones <lee@kernel.org> > 3 files changed, 482 insertions(+), 368 deletions(-)
From: Min Li <min.li.xe@renesas.com> The main porpose of this series is [PATCH 1/5], which is to support read/write to the whole 32-bit address space. Other changes are increamental since [PATCH 1/5]. Min Li (5): ptp: clockmatrix: support 32-bit address space ptp: clockmatrix: set write phase timer to 0 when not in PCW mode ptp: clockmatrix: dco input-to-output delay is 20 FOD cycles + 8ns ptp: clockmatrix: Fix caps.max_adj to reflect DPLL_MAX_FREQ_OFFSET[MAX_FFO] ptp: clockmatrix: move register and firmware related definition to idt8a340_reg.h drivers/ptp/ptp_clockmatrix.c | 120 ++++-- drivers/ptp/ptp_clockmatrix.h | 66 +-- include/linux/mfd/idt8a340_reg.h | 664 ++++++++++++++++++------------- 3 files changed, 482 insertions(+), 368 deletions(-)