cache: ax45mp_cache: Align end size to cache boundary in ax45mp_dma_cache_wback()

Commit Message

Lad, Prabhakar Feb. 3, 2024, 9:26 p.m. UTC

From: Lad Prabhakar <[e-mail]>

Align the end size to cache boundary size in ax45mp_dma_cache_wback()
callback likewise done in ax45mp_dma_cache_inv() callback.

Additionally return early in case of start == end.

Fixes: d34599bcd2e4 ("cache: Add L2 cache management for Andes AX45MP RISC-V core")
Reported-by: Pavel Machek <[e-mail]>
Signed-off-by: Lad Prabhakar <[e-mail]>
---
 drivers/cache/ax45mp_cache.c | 4 ++++
 1 file changed, 4 insertions(+)

Comments

[e-mail] March 25, 2024, 4:42 a.m. UTC | #1

Hello:

This patch was applied to riscv/linux.git (fixes)
by Conor Dooley <[e-mail]>:

On Sat,  3 Feb 2024 21:26:40 +0000 you wrote:
> From: Lad Prabhakar <[e-mail]>
> 
> Align the end size to cache boundary size in ax45mp_dma_cache_wback()
> callback likewise done in ax45mp_dma_cache_inv() callback.
> 
> Additionally return early in case of start == end.
> 
> [...]

Here is the summary with links:
  - cache: ax45mp_cache: Align end size to cache boundary in ax45mp_dma_cache_wback()
    https://git.kernel.org/riscv/c/9bd405c48b0a

You are awesome, thank you!

Patch

diff --git a/drivers/cache/ax45mp_cache.c b/drivers/cache/ax45mp_cache.c
index 57186c58dc84..1d7dd3d2c101 100644
--- a/drivers/cache/ax45mp_cache.c
+++ b/drivers/cache/ax45mp_cache.c
@@ -129,8 +129,12 @@  static void ax45mp_dma_cache_wback(phys_addr_t paddr, size_t size)
 	unsigned long line_size;
 	unsigned long flags;
 
+	if (unlikely(start == end))
+		return;
+
 	line_size = ax45mp_priv.ax45mp_cache_line_size;
 	start = start & (~(line_size - 1));
+	end = ((end + line_size - 1) & (~(line_size - 1)));
 	local_irq_save(flags);
 	ax45mp_cpu_dcache_wb_range(start, end);
 	local_irq_restore(flags);