| Message ID | 20240307032327.4799-5-ltaylorsimpson@gmail.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | Clean up .new decode and scripts | expand |
> -----Original Message----- > From: Taylor Simpson <ltaylorsimpson@gmail.com> > Sent: Wednesday, March 6, 2024 9:23 PM > To: qemu-devel@nongnu.org > Cc: Brian Cain <bcain@quicinc.com>; Matheus Bernardino (QUIC) > <quic_mathbern@quicinc.com>; Sid Manning <sidneym@quicinc.com>; > Marco Liebel (QUIC) <quic_mliebel@quicinc.com>; > richard.henderson@linaro.org; philmd@linaro.org; ale@rev.ng; anjo@rev.ng; > ltaylorsimpson@gmail.com > Subject: [PATCH v2 4/9] Hexagon (target/hexagon) Mark has_pred_dest in > trans functions > > WARNING: This email originated from outside of Qualcomm. Please be wary > of any links or attachments, and do not enable macros. > > Check that the value matches opcode_wregs > > Signed-off-by: Taylor Simpson <ltaylorsimpson@gmail.com> > --- Reviewed-by: Brian Cain <bcain@quicinc.com> > target/hexagon/insn.h | 1 + > target/hexagon/decode.c | 3 +++ > target/hexagon/gen_trans_funcs.py | 5 +++++ > 3 files changed, 9 insertions(+) > > diff --git a/target/hexagon/insn.h b/target/hexagon/insn.h > index a770379958..24dcf7fe9f 100644 > --- a/target/hexagon/insn.h > +++ b/target/hexagon/insn.h > @@ -41,6 +41,7 @@ struct Instruction { > uint32_t new_value_producer_slot:4; > int32_t new_read_idx; > int32_t dest_idx; > + bool has_pred_dest; > > bool part1; /* > * cmp-jumps are split into two insns. > diff --git a/target/hexagon/decode.c b/target/hexagon/decode.c > index a4d8500fea..84a3899556 100644 > --- a/target/hexagon/decode.c > +++ b/target/hexagon/decode.c > @@ -366,6 +366,9 @@ static void decode_shuffle_for_execution(Packet > *packet) > for (flag = false, i = 0; i < last_insn + 1; i++) { > int opcode = packet->insn[i].opcode; > > + g_assert(packet->insn[i].has_pred_dest == > + (strstr(opcode_wregs[opcode], "Pd4") || > + strstr(opcode_wregs[opcode], "Pe4"))); > if ((strstr(opcode_wregs[opcode], "Pd4") || > strstr(opcode_wregs[opcode], "Pe4")) && > GET_ATTRIB(opcode, A_STORE) == 0) { > diff --git a/target/hexagon/gen_trans_funcs.py > b/target/hexagon/gen_trans_funcs.py > index 1201172dda..9f86b4edbd 100755 > --- a/target/hexagon/gen_trans_funcs.py > +++ b/target/hexagon/gen_trans_funcs.py > @@ -70,6 +70,7 @@ def mark_which_imm_extended(f, tag): > ## insn->regno[2] = args->Rt; > ## insn->new_read_idx = -1; > ## insn->dest_idx = 0; > +## insn->has_pred_dest = false; > ## return true; > ## } > ## > @@ -88,6 +89,7 @@ def gen_trans_funcs(f): > > new_read_idx = -1 > dest_idx = -1 > + has_pred_dest = "false" > for regno, (reg_type, reg_id, *_) in enumerate(regs): > reg = hex_common.get_register(tag, reg_type, reg_id) > f.write(code_fmt(f"""\ > @@ -98,6 +100,8 @@ def gen_trans_funcs(f): > # dest_idx should be the first destination, so check for -1 > if reg.is_written() and dest_idx == -1: > dest_idx = regno > + if reg_type == "P" and reg.is_written() and not reg.is_read(): > + has_pred_dest = "true" > > if len(imms) != 0: > mark_which_imm_extended(f, tag) > @@ -121,6 +125,7 @@ def gen_trans_funcs(f): > f.write(code_fmt(f"""\ > insn->new_read_idx = {new_read_idx}; > insn->dest_idx = {dest_idx}; > + insn->has_pred_dest = {has_pred_dest}; > """)) > f.write(textwrap.dedent(f"""\ > return true; > -- > 2.34.1
diff --git a/target/hexagon/insn.h b/target/hexagon/insn.h index a770379958..24dcf7fe9f 100644 --- a/target/hexagon/insn.h +++ b/target/hexagon/insn.h @@ -41,6 +41,7 @@ struct Instruction { uint32_t new_value_producer_slot:4; int32_t new_read_idx; int32_t dest_idx; + bool has_pred_dest; bool part1; /* * cmp-jumps are split into two insns. diff --git a/target/hexagon/decode.c b/target/hexagon/decode.c index a4d8500fea..84a3899556 100644 --- a/target/hexagon/decode.c +++ b/target/hexagon/decode.c @@ -366,6 +366,9 @@ static void decode_shuffle_for_execution(Packet *packet) for (flag = false, i = 0; i < last_insn + 1; i++) { int opcode = packet->insn[i].opcode; + g_assert(packet->insn[i].has_pred_dest == + (strstr(opcode_wregs[opcode], "Pd4") || + strstr(opcode_wregs[opcode], "Pe4"))); if ((strstr(opcode_wregs[opcode], "Pd4") || strstr(opcode_wregs[opcode], "Pe4")) && GET_ATTRIB(opcode, A_STORE) == 0) { diff --git a/target/hexagon/gen_trans_funcs.py b/target/hexagon/gen_trans_funcs.py index 1201172dda..9f86b4edbd 100755 --- a/target/hexagon/gen_trans_funcs.py +++ b/target/hexagon/gen_trans_funcs.py @@ -70,6 +70,7 @@ def mark_which_imm_extended(f, tag): ## insn->regno[2] = args->Rt; ## insn->new_read_idx = -1; ## insn->dest_idx = 0; +## insn->has_pred_dest = false; ## return true; ## } ## @@ -88,6 +89,7 @@ def gen_trans_funcs(f): new_read_idx = -1 dest_idx = -1 + has_pred_dest = "false" for regno, (reg_type, reg_id, *_) in enumerate(regs): reg = hex_common.get_register(tag, reg_type, reg_id) f.write(code_fmt(f"""\ @@ -98,6 +100,8 @@ def gen_trans_funcs(f): # dest_idx should be the first destination, so check for -1 if reg.is_written() and dest_idx == -1: dest_idx = regno + if reg_type == "P" and reg.is_written() and not reg.is_read(): + has_pred_dest = "true" if len(imms) != 0: mark_which_imm_extended(f, tag) @@ -121,6 +125,7 @@ def gen_trans_funcs(f): f.write(code_fmt(f"""\ insn->new_read_idx = {new_read_idx}; insn->dest_idx = {dest_idx}; + insn->has_pred_dest = {has_pred_dest}; """)) f.write(textwrap.dedent(f"""\ return true;
Check that the value matches opcode_wregs Signed-off-by: Taylor Simpson <ltaylorsimpson@gmail.com> --- target/hexagon/insn.h | 1 + target/hexagon/decode.c | 3 +++ target/hexagon/gen_trans_funcs.py | 5 +++++ 3 files changed, 9 insertions(+)