diff mbox series

[v2] usb: typec: ucsi: Wait 20ms before reading CCI after a reset

Message ID 20240403-ucsi-reset-delay-v2-1-244c175825a4@chromium.org (mailing list archive)
State Superseded
Headers show
Series [v2] usb: typec: ucsi: Wait 20ms before reading CCI after a reset | expand

Commit Message

Pavan Holla April 3, 2024, 5:54 p.m. UTC
The PPM might take time to process a reset. Allow 20ms for the reset to
be processed before reading the CCI.

Signed-off-by: Pavan Holla <pholla@chromium.org>
---
The PPM might take time to process a reset and set the CCI. Give the PPM
20ms to update it's CCI.

Based on the discussion in v1, this should not slow down existing
implementations because they would not set any bits in the CCI after a reset,
and would take a 20ms delay to read the CCI anyway. This change just makes the
delay explicit, and reduces a CCI read. Based on the spec, the PPM has
10ms to set busy, so, 20ms seems like a reasonable delay before we read
the CCI.
---
Changes in v2:
- Commit message updated.
- Link to v1: https://lore.kernel.org/r/20240325-ucsi-reset-delay-v1-1-d9e183e0f1e6@chromium.org
---
 drivers/usb/typec/ucsi/ucsi.c | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)


---
base-commit: 4cece764965020c22cff7665b18a012006359095
change-id: 20240325-ucsi-reset-delay-bdf6712455fd

Best regards,

Comments

Prashant Malani April 3, 2024, 10:22 p.m. UTC | #1
Hi Pavan,

On Wed, Apr 3, 2024 at 10:57 AM Pavan Holla <pholla@chromium.org> wrote:
>
> The PPM might take time to process a reset. Allow 20ms for the reset to
> be processed before reading the CCI.
>
> Signed-off-by: Pavan Holla <pholla@chromium.org>
> ---
> The PPM might take time to process a reset and set the CCI. Give the PPM
> 20ms to update it's CCI.
>
> Based on the discussion in v1, this should not slow down existing
> implementations because they would not set any bits in the CCI after a reset,
> and would take a 20ms delay to read the CCI anyway. This change just makes the
> delay explicit, and reduces a CCI read. Based on the spec, the PPM has
> 10ms to set busy, so, 20ms seems like a reasonable delay before we read
> the CCI.

The above information is helpful context, and should be included
in the commit message, otherwise it will get lost on patch application.

With that, feel free to add:
Reviewed-by: Prashant Malani <pmalani@chromium.org>

BR,

-Prashant
diff mbox series

Patch

diff --git a/drivers/usb/typec/ucsi/ucsi.c b/drivers/usb/typec/ucsi/ucsi.c
index cf52cb34d285..c0706c40fa64 100644
--- a/drivers/usb/typec/ucsi/ucsi.c
+++ b/drivers/usb/typec/ucsi/ucsi.c
@@ -1280,6 +1280,9 @@  static int ucsi_reset_ppm(struct ucsi *ucsi)
 			goto out;
 		}
 
+		/* Give the PPM time to process a reset before reading CCI */
+		msleep(20);
+
 		ret = ucsi->ops->read(ucsi, UCSI_CCI, &cci, sizeof(cci));
 		if (ret)
 			goto out;
@@ -1293,7 +1296,6 @@  static int ucsi_reset_ppm(struct ucsi *ucsi)
 				goto out;
 		}
 
-		msleep(20);
 	} while (!(cci & UCSI_CCI_RESET_COMPLETE));
 
 out: