| Message ID | 20240328093439.18712-1-benjamin.gaignard@collabora.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | media: verisilicon: AV1: Be more fexible on postproc capabilities | expand |
Hi, Le jeudi 28 mars 2024 à 10:34 +0100, Benjamin Gaignard a écrit : > RK3588 post-processor block is able to convert 10 bits streams > into 8 bits pixels format. Does it come with any HDR to SDR capabilities ? cause stripping off 2 bits means that tone mapping will cause a lot of banding as it won't have the expected precision. I'm simply trying to make up the big portrait so we don't just offer yet another foot gun. But perhaps its fine to offer this, its just that we don't have a mechanism to report which pixel format in the selection will cause data lost. Nicolas > > Signed-off-by: Benjamin Gaignard <benjamin.gaignard@collabora.com> > Fixes: 003afda97c65 ("media: verisilicon: Enable AV1 decoder on rk3588") > --- > drivers/media/platform/verisilicon/rockchip_vpu_hw.c | 1 - > 1 file changed, 1 deletion(-) > > diff --git a/drivers/media/platform/verisilicon/rockchip_vpu_hw.c b/drivers/media/platform/verisilicon/rockchip_vpu_hw.c > index f97527670783..964122e7c355 100644 > --- a/drivers/media/platform/verisilicon/rockchip_vpu_hw.c > +++ b/drivers/media/platform/verisilicon/rockchip_vpu_hw.c > @@ -82,7 +82,6 @@ static const struct hantro_fmt rockchip_vpu981_postproc_fmts[] = { > { > .fourcc = V4L2_PIX_FMT_NV12, > .codec_mode = HANTRO_MODE_NONE, > - .match_depth = true, > .postprocessed = true, > .frmsize = { > .min_width = ROCKCHIP_VPU981_MIN_SIZE,
Le 04/04/2024 à 19:59, Nicolas Dufresne a écrit : > Hi, > > Le jeudi 28 mars 2024 à 10:34 +0100, Benjamin Gaignard a écrit : >> RK3588 post-processor block is able to convert 10 bits streams >> into 8 bits pixels format. > Does it come with any HDR to SDR capabilities ? cause stripping off 2 bits means > that tone mapping will cause a lot of banding as it won't have the expected > precision. I'm simply trying to make up the big portrait so we don't just offer > yet another foot gun. But perhaps its fine to offer this, its just that we don't > have a mechanism to report which pixel format in the selection will cause data > lost. No it just to enable post-processor capabilities like we have already for G2/HEVC. Since it is a post-processor pixel format it will be enumerated after V4L2_PIX_FMT_NV15_4L4 so it will update to userland to decide to use it or not. Benjamin > > Nicolas > >> Signed-off-by: Benjamin Gaignard <benjamin.gaignard@collabora.com> >> Fixes: 003afda97c65 ("media: verisilicon: Enable AV1 decoder on rk3588") >> --- >> drivers/media/platform/verisilicon/rockchip_vpu_hw.c | 1 - >> 1 file changed, 1 deletion(-) >> >> diff --git a/drivers/media/platform/verisilicon/rockchip_vpu_hw.c b/drivers/media/platform/verisilicon/rockchip_vpu_hw.c >> index f97527670783..964122e7c355 100644 >> --- a/drivers/media/platform/verisilicon/rockchip_vpu_hw.c >> +++ b/drivers/media/platform/verisilicon/rockchip_vpu_hw.c >> @@ -82,7 +82,6 @@ static const struct hantro_fmt rockchip_vpu981_postproc_fmts[] = { >> { >> .fourcc = V4L2_PIX_FMT_NV12, >> .codec_mode = HANTRO_MODE_NONE, >> - .match_depth = true, >> .postprocessed = true, >> .frmsize = { >> .min_width = ROCKCHIP_VPU981_MIN_SIZE, >
Le 05/04/2024 à 10:17, Benjamin Gaignard a écrit : > > Le 04/04/2024 à 19:59, Nicolas Dufresne a écrit : >> Hi, >> >> Le jeudi 28 mars 2024 à 10:34 +0100, Benjamin Gaignard a écrit : >>> RK3588 post-processor block is able to convert 10 bits streams >>> into 8 bits pixels format. >> Does it come with any HDR to SDR capabilities ? cause stripping off 2 >> bits means >> that tone mapping will cause a lot of banding as it won't have the >> expected >> precision. I'm simply trying to make up the big portrait so we don't >> just offer >> yet another foot gun. But perhaps its fine to offer this, its just >> that we don't >> have a mechanism to report which pixel format in the selection will >> cause data >> lost. > > No it just to enable post-processor capabilities like we have already > for G2/HEVC. > Since it is a post-processor pixel format it will be enumerated after > V4L2_PIX_FMT_NV15_4L4 > so it will update to userland to decide to use it or not. Gentle ping, Regards, Benjamin > > Benjamin > >> >> Nicolas >> >>> Signed-off-by: Benjamin Gaignard <benjamin.gaignard@collabora.com> >>> Fixes: 003afda97c65 ("media: verisilicon: Enable AV1 decoder on >>> rk3588") >>> --- >>> drivers/media/platform/verisilicon/rockchip_vpu_hw.c | 1 - >>> 1 file changed, 1 deletion(-) >>> >>> diff --git a/drivers/media/platform/verisilicon/rockchip_vpu_hw.c >>> b/drivers/media/platform/verisilicon/rockchip_vpu_hw.c >>> index f97527670783..964122e7c355 100644 >>> --- a/drivers/media/platform/verisilicon/rockchip_vpu_hw.c >>> +++ b/drivers/media/platform/verisilicon/rockchip_vpu_hw.c >>> @@ -82,7 +82,6 @@ static const struct hantro_fmt >>> rockchip_vpu981_postproc_fmts[] = { >>> { >>> .fourcc = V4L2_PIX_FMT_NV12, >>> .codec_mode = HANTRO_MODE_NONE, >>> - .match_depth = true, >>> .postprocessed = true, >>> .frmsize = { >>> .min_width = ROCKCHIP_VPU981_MIN_SIZE, >>
Le jeudi 28 mars 2024 à 10:34 +0100, Benjamin Gaignard a écrit : > RK3588 post-processor block is able to convert 10 bits streams > into 8 bits pixels format. > > Signed-off-by: Benjamin Gaignard <benjamin.gaignard@collabora.com> > Fixes: 003afda97c65 ("media: verisilicon: Enable AV1 decoder on rk3588") Reviewed-by: Nicolas Dufresne <nicolas.dufresne@collabora.com> > --- > drivers/media/platform/verisilicon/rockchip_vpu_hw.c | 1 - > 1 file changed, 1 deletion(-) > > diff --git a/drivers/media/platform/verisilicon/rockchip_vpu_hw.c b/drivers/media/platform/verisilicon/rockchip_vpu_hw.c > index f97527670783..964122e7c355 100644 > --- a/drivers/media/platform/verisilicon/rockchip_vpu_hw.c > +++ b/drivers/media/platform/verisilicon/rockchip_vpu_hw.c > @@ -82,7 +82,6 @@ static const struct hantro_fmt rockchip_vpu981_postproc_fmts[] = { > { > .fourcc = V4L2_PIX_FMT_NV12, > .codec_mode = HANTRO_MODE_NONE, > - .match_depth = true, > .postprocessed = true, > .frmsize = { > .min_width = ROCKCHIP_VPU981_MIN_SIZE,
diff --git a/drivers/media/platform/verisilicon/rockchip_vpu_hw.c b/drivers/media/platform/verisilicon/rockchip_vpu_hw.c index f97527670783..964122e7c355 100644 --- a/drivers/media/platform/verisilicon/rockchip_vpu_hw.c +++ b/drivers/media/platform/verisilicon/rockchip_vpu_hw.c @@ -82,7 +82,6 @@ static const struct hantro_fmt rockchip_vpu981_postproc_fmts[] = { { .fourcc = V4L2_PIX_FMT_NV12, .codec_mode = HANTRO_MODE_NONE, - .match_depth = true, .postprocessed = true, .frmsize = { .min_width = ROCKCHIP_VPU981_MIN_SIZE,
RK3588 post-processor block is able to convert 10 bits streams into 8 bits pixels format. Signed-off-by: Benjamin Gaignard <benjamin.gaignard@collabora.com> Fixes: 003afda97c65 ("media: verisilicon: Enable AV1 decoder on rk3588") --- drivers/media/platform/verisilicon/rockchip_vpu_hw.c | 1 - 1 file changed, 1 deletion(-)