| Message ID | 20240408132925.1880571-5-quic_kriskura@quicinc.com (mailing list archive) |
|---|---|
| State | Superseded |
| Headers | show |
| Series | Add multiport support for DWC3 controllers | expand |
On Mon, Apr 08, 2024, Krishna Kurapati wrote: > Currently the DWC3 driver supports only single port controller > which requires at least one HS PHY and at most one SS PHY. > > But the DWC3 USB controller can be connected to multiple ports and > each port can have their own PHYs. Each port of the multiport > controller can either be HS+SS capable or HS only capable > Proper quantification of them is required to modify GUSB2PHYCFG > and GUSB3PIPECTL registers appropriately. > > Add support for detecting, obtaining and configuring PHYs supported > by a multiport controller. Limit support to multiport controllers > with up to four ports for now (e.g. as needed for SC8280XP). > > Signed-off-by: Krishna Kurapati <quic_kriskura@quicinc.com> > Reviewed-by: Johan Hovold <johan+linaro@kernel.org> > --- > drivers/usb/dwc3/core.c | 251 ++++++++++++++++++++++++++++------------ > drivers/usb/dwc3/core.h | 14 ++- > drivers/usb/dwc3/drd.c | 15 ++- > 3 files changed, 193 insertions(+), 87 deletions(-) > <snip> > @@ -1937,6 +2020,10 @@ static int dwc3_get_num_ports(struct dwc3 *dwc) > > iounmap(base); > > + if (dwc->num_usb2_ports > DWC3_MAX_PORTS || > + dwc->num_usb3_ports > DWC3_MAX_PORTS) > + return -ENOMEM; This should be -EINVAL. > + > return 0; > } <snip> > diff --git a/drivers/usb/dwc3/core.h b/drivers/usb/dwc3/core.h > index 341e4c73cb2e..df2e111aa848 100644 > --- a/drivers/usb/dwc3/core.h > +++ b/drivers/usb/dwc3/core.h > @@ -33,6 +33,12 @@ > > #include <linux/power_supply.h> > > +/* > + * Maximum number of ports currently supported for multiport > + * controllers. This macro here is being used per USB2 vs USB3 ports rather than USB2 + USB3, unlike the xHCI MAXPORTS. You can clarify in the comment and rename the macro to avoid any confusion. You can also create 2 separate macros for number of USB2 and USB3 ports even if they share the same value. As noted[*], we support have different max number of usb2 ports vs usb3 ports. I would suggest splitting the macros. [*] https://lore.kernel.org/linux-usb/20230801013031.ft3zpoatiyfegmh6@synopsys.com/ > + */ > +#define DWC3_MAX_PORTS 4 > + > But it's not a big issue whether you decided to push a new version or a create a separate patch for the comments above. Here's my Ack: Acked-by: Thinh Nguyen <Thinh.Nguyen@synopsys.com> Thanks, Thinh
On 4/9/2024 6:41 AM, Thinh Nguyen wrote: > On Mon, Apr 08, 2024, Krishna Kurapati wrote: >> Currently the DWC3 driver supports only single port controller >> which requires at least one HS PHY and at most one SS PHY. >> >> But the DWC3 USB controller can be connected to multiple ports and >> each port can have their own PHYs. Each port of the multiport >> controller can either be HS+SS capable or HS only capable >> Proper quantification of them is required to modify GUSB2PHYCFG >> and GUSB3PIPECTL registers appropriately. >> >> Add support for detecting, obtaining and configuring PHYs supported >> by a multiport controller. Limit support to multiport controllers >> with up to four ports for now (e.g. as needed for SC8280XP). >> >> Signed-off-by: Krishna Kurapati <quic_kriskura@quicinc.com> >> Reviewed-by: Johan Hovold <johan+linaro@kernel.org> >> --- >> drivers/usb/dwc3/core.c | 251 ++++++++++++++++++++++++++++------------ >> drivers/usb/dwc3/core.h | 14 ++- >> drivers/usb/dwc3/drd.c | 15 ++- >> 3 files changed, 193 insertions(+), 87 deletions(-) >> > > <snip> > >> @@ -1937,6 +2020,10 @@ static int dwc3_get_num_ports(struct dwc3 *dwc) >> >> iounmap(base); >> >> + if (dwc->num_usb2_ports > DWC3_MAX_PORTS || >> + dwc->num_usb3_ports > DWC3_MAX_PORTS) >> + return -ENOMEM; > > This should be -EINVAL. > >> + >> return 0; >> } > > <snip> > >> diff --git a/drivers/usb/dwc3/core.h b/drivers/usb/dwc3/core.h >> index 341e4c73cb2e..df2e111aa848 100644 >> --- a/drivers/usb/dwc3/core.h >> +++ b/drivers/usb/dwc3/core.h >> @@ -33,6 +33,12 @@ >> >> #include <linux/power_supply.h> >> >> +/* >> + * Maximum number of ports currently supported for multiport >> + * controllers. > > This macro here is being used per USB2 vs USB3 ports rather than USB2 + > USB3, unlike the xHCI MAXPORTS. You can clarify in the comment and > rename the macro to avoid any confusion. You can also create 2 separate > macros for number of USB2 and USB3 ports even if they share the same > value. > > As noted[*], we support have different max number of usb2 ports vs usb3 > ports. I would suggest splitting the macros. > Hi Thinh, This macro was intended only to identify how many USB2 (or USB3) Phy's were serviced/operated by this driver, not how many logical ports present (like in xHCI). I don't think it would be confusing currently given that it is only used to identify number of generic phy instances to allocate and not used for any other purpose. Once the num_usb2_ports and num_usb3_ports are read by get_num_ports(...) call, they directly indicate how many ports are HS and SS respectively. Keeping the same in mind, I returned ENOMEM above (as you mentioned) because we don't allocate more than DWC3_MAX_PORTS and if the number of hs or ss ports is more than that, we simply return ENOMEM saying the driver doesn't support operating those many phy's. > [*] https://lore.kernel.org/linux-usb/20230801013031.ft3zpoatiyfegmh6@synopsys.com/ > >> + */ >> +#define DWC3_MAX_PORTS 4 >> + >> > > But it's not a big issue whether you decided to push a new version or a > create a separate patch for the comments above. Here's my Ack: > Since this is not a bug, I would prefer to make a separate patch to rename the macros. (If that is fine). > Acked-by: Thinh Nguyen <Thinh.Nguyen@synopsys.com> > > Thanks, > Thinh
On Tue, Apr 09, 2024, Krishna Kurapati PSSNV wrote: > > > On 4/9/2024 6:41 AM, Thinh Nguyen wrote: > > On Mon, Apr 08, 2024, Krishna Kurapati wrote: > > > Currently the DWC3 driver supports only single port controller > > > which requires at least one HS PHY and at most one SS PHY. > > > > > > But the DWC3 USB controller can be connected to multiple ports and > > > each port can have their own PHYs. Each port of the multiport > > > controller can either be HS+SS capable or HS only capable > > > Proper quantification of them is required to modify GUSB2PHYCFG > > > and GUSB3PIPECTL registers appropriately. > > > > > > Add support for detecting, obtaining and configuring PHYs supported > > > by a multiport controller. Limit support to multiport controllers > > > with up to four ports for now (e.g. as needed for SC8280XP). > > > > > > Signed-off-by: Krishna Kurapati <quic_kriskura@quicinc.com> > > > Reviewed-by: Johan Hovold <johan+linaro@kernel.org> > > > --- > > > drivers/usb/dwc3/core.c | 251 ++++++++++++++++++++++++++++------------ > > > drivers/usb/dwc3/core.h | 14 ++- > > > drivers/usb/dwc3/drd.c | 15 ++- > > > 3 files changed, 193 insertions(+), 87 deletions(-) > > > > > > > <snip> > > > > > @@ -1937,6 +2020,10 @@ static int dwc3_get_num_ports(struct dwc3 *dwc) > > > iounmap(base); > > > + if (dwc->num_usb2_ports > DWC3_MAX_PORTS || > > > + dwc->num_usb3_ports > DWC3_MAX_PORTS) > > > + return -ENOMEM; > > > > This should be -EINVAL. > > > > > + > > > return 0; > > > } > > > > <snip> > > > > > diff --git a/drivers/usb/dwc3/core.h b/drivers/usb/dwc3/core.h > > > index 341e4c73cb2e..df2e111aa848 100644 > > > --- a/drivers/usb/dwc3/core.h > > > +++ b/drivers/usb/dwc3/core.h > > > @@ -33,6 +33,12 @@ > > > #include <linux/power_supply.h> > > > +/* > > > + * Maximum number of ports currently supported for multiport > > > + * controllers. > > > > This macro here is being used per USB2 vs USB3 ports rather than USB2 + > > USB3, unlike the xHCI MAXPORTS. You can clarify in the comment and > > rename the macro to avoid any confusion. You can also create 2 separate > > macros for number of USB2 and USB3 ports even if they share the same > > value. > > > > As noted[*], we support have different max number of usb2 ports vs usb3 > > ports. I would suggest splitting the macros. > > > > Hi Thinh, > > This macro was intended only to identify how many USB2 (or USB3) Phy's were > serviced/operated by this driver, not how many logical ports present (like That's not what you described in the comment right above the macro... > in xHCI). I don't think it would be confusing currently given that it is > only used to identify number of generic phy instances to allocate and not > used for any other purpose. Once the num_usb2_ports and num_usb3_ports are > read by get_num_ports(...) call, they directly indicate how many ports are Those fields are clear. But for DWC3_MAX_PORTS, based on the name and comment of the macro, it's not clear. > HS and SS respectively. Keeping the same in mind, I returned ENOMEM above > (as you mentioned) because we don't allocate more than DWC3_MAX_PORTS and if > the number of hs or ss ports is more than that, we simply return ENOMEM > saying the driver doesn't support operating those many phy's. The error code -ENOMEM indicates out of memory failure. The check condition dwc->num_usb2_ports > DWC3_MAX_PORTS indicates invalid config. There's no allocation in that check. > > > [*] https://urldefense.com/v3/__https://lore.kernel.org/linux-usb/20230801013031.ft3zpoatiyfegmh6@synopsys.com/__;!!A4F2R9G_pg!azHqgm92ENkFQrpv6Fhs6PCe210VGOAIrsuGFhrgmfaor8N_kWLu6rxkPpbeCBTLL4NbUpOWlQ0ufmP9DFwO9iFc0XdSEg$ > > > > > + */ > > > +#define DWC3_MAX_PORTS 4 > > > + > > > > > > > But it's not a big issue whether you decided to push a new version or a > > create a separate patch for the comments above. Here's my Ack: > > > > Since this is not a bug, I would prefer to make a separate patch to rename > the macros. (If that is fine). > That is fine with me. Thanks for your effort pursuing and continue working on this series. BR, Thinh
On 4/9/2024 11:43 PM, Thinh Nguyen wrote: > On Tue, Apr 09, 2024, Krishna Kurapati PSSNV wrote: >> >> >> On 4/9/2024 6:41 AM, Thinh Nguyen wrote: >>> On Mon, Apr 08, 2024, Krishna Kurapati wrote: >>>> Currently the DWC3 driver supports only single port controller >>>> which requires at least one HS PHY and at most one SS PHY. >>>> >>>> But the DWC3 USB controller can be connected to multiple ports and >>>> each port can have their own PHYs. Each port of the multiport >>>> controller can either be HS+SS capable or HS only capable >>>> Proper quantification of them is required to modify GUSB2PHYCFG >>>> and GUSB3PIPECTL registers appropriately. >>>> >>>> Add support for detecting, obtaining and configuring PHYs supported >>>> by a multiport controller. Limit support to multiport controllers >>>> with up to four ports for now (e.g. as needed for SC8280XP). >>>> >>>> Signed-off-by: Krishna Kurapati <quic_kriskura@quicinc.com> >>>> Reviewed-by: Johan Hovold <johan+linaro@kernel.org> >>>> --- >>>> drivers/usb/dwc3/core.c | 251 ++++++++++++++++++++++++++++------------ >>>> drivers/usb/dwc3/core.h | 14 ++- >>>> drivers/usb/dwc3/drd.c | 15 ++- >>>> 3 files changed, 193 insertions(+), 87 deletions(-) >>>> >>> >>> <snip> >>> >>>> @@ -1937,6 +2020,10 @@ static int dwc3_get_num_ports(struct dwc3 *dwc) >>>> iounmap(base); >>>> + if (dwc->num_usb2_ports > DWC3_MAX_PORTS || >>>> + dwc->num_usb3_ports > DWC3_MAX_PORTS) >>>> + return -ENOMEM; >>> >>> This should be -EINVAL. >>> >>>> + >>>> return 0; >>>> } >>> >>> <snip> >>> >>>> diff --git a/drivers/usb/dwc3/core.h b/drivers/usb/dwc3/core.h >>>> index 341e4c73cb2e..df2e111aa848 100644 >>>> --- a/drivers/usb/dwc3/core.h >>>> +++ b/drivers/usb/dwc3/core.h >>>> @@ -33,6 +33,12 @@ >>>> #include <linux/power_supply.h> >>>> +/* >>>> + * Maximum number of ports currently supported for multiport >>>> + * controllers. >>> >>> This macro here is being used per USB2 vs USB3 ports rather than USB2 + >>> USB3, unlike the xHCI MAXPORTS. You can clarify in the comment and >>> rename the macro to avoid any confusion. You can also create 2 separate >>> macros for number of USB2 and USB3 ports even if they share the same >>> value. >>> >>> As noted[*], we support have different max number of usb2 ports vs usb3 >>> ports. I would suggest splitting the macros. >>> >> >> Hi Thinh, >> >> This macro was intended only to identify how many USB2 (or USB3) Phy's were >> serviced/operated by this driver, not how many logical ports present (like > > That's not what you described in the comment right above the macro... > >> in xHCI). I don't think it would be confusing currently given that it is >> only used to identify number of generic phy instances to allocate and not >> used for any other purpose. Once the num_usb2_ports and num_usb3_ports are >> read by get_num_ports(...) call, they directly indicate how many ports are > > Those fields are clear. But for DWC3_MAX_PORTS, based on the name and > comment of the macro, it's not clear. > >> HS and SS respectively. Keeping the same in mind, I returned ENOMEM above >> (as you mentioned) because we don't allocate more than DWC3_MAX_PORTS and if >> the number of hs or ss ports is more than that, we simply return ENOMEM >> saying the driver doesn't support operating those many phy's. > > The error code -ENOMEM indicates out of memory failure. The check > condition dwc->num_usb2_ports > DWC3_MAX_PORTS indicates invalid config. > There's no allocation in that check. > >> >>> [*] https://urldefense.com/v3/__https://lore.kernel.org/linux-usb/20230801013031.ft3zpoatiyfegmh6@synopsys.com/__;!!A4F2R9G_pg!azHqgm92ENkFQrpv6Fhs6PCe210VGOAIrsuGFhrgmfaor8N_kWLu6rxkPpbeCBTLL4NbUpOWlQ0ufmP9DFwO9iFc0XdSEg$ >>> >>>> + */ >>>> +#define DWC3_MAX_PORTS 4 >>>> + >>>> >>> >>> But it's not a big issue whether you decided to push a new version or a >>> create a separate patch for the comments above. Here's my Ack: >>> >> >> Since this is not a bug, I would prefer to make a separate patch to rename >> the macros. (If that is fine). >> > > That is fine with me. Thanks for your effort pursuing and continue > working on this series. > Thanks Thinh. If there are no other issues, I will wait till Greg picks the series up. Thanks for the reviews throughout the series. Regards, Krishna,
On Wed, Apr 10, 2024 at 10:10:54AM +0530, Krishna Kurapati PSSNV wrote: > > > On 4/9/2024 11:43 PM, Thinh Nguyen wrote: > > On Tue, Apr 09, 2024, Krishna Kurapati PSSNV wrote: > > > > > > > > > On 4/9/2024 6:41 AM, Thinh Nguyen wrote: > > > > On Mon, Apr 08, 2024, Krishna Kurapati wrote: > > > > > Currently the DWC3 driver supports only single port controller > > > > > which requires at least one HS PHY and at most one SS PHY. > > > > > > > > > > But the DWC3 USB controller can be connected to multiple ports and > > > > > each port can have their own PHYs. Each port of the multiport > > > > > controller can either be HS+SS capable or HS only capable > > > > > Proper quantification of them is required to modify GUSB2PHYCFG > > > > > and GUSB3PIPECTL registers appropriately. > > > > > > > > > > Add support for detecting, obtaining and configuring PHYs supported > > > > > by a multiport controller. Limit support to multiport controllers > > > > > with up to four ports for now (e.g. as needed for SC8280XP). > > > > > > > > > > Signed-off-by: Krishna Kurapati <quic_kriskura@quicinc.com> > > > > > Reviewed-by: Johan Hovold <johan+linaro@kernel.org> > > > > > --- > > > > > drivers/usb/dwc3/core.c | 251 ++++++++++++++++++++++++++++------------ > > > > > drivers/usb/dwc3/core.h | 14 ++- > > > > > drivers/usb/dwc3/drd.c | 15 ++- > > > > > 3 files changed, 193 insertions(+), 87 deletions(-) > > > > > > > > > > > > > <snip> > > > > > > > > > @@ -1937,6 +2020,10 @@ static int dwc3_get_num_ports(struct dwc3 *dwc) > > > > > iounmap(base); > > > > > + if (dwc->num_usb2_ports > DWC3_MAX_PORTS || > > > > > + dwc->num_usb3_ports > DWC3_MAX_PORTS) > > > > > + return -ENOMEM; > > > > > > > > This should be -EINVAL. > > > > > > > > > + > > > > > return 0; > > > > > } > > > > > > > > <snip> > > > > > > > > > diff --git a/drivers/usb/dwc3/core.h b/drivers/usb/dwc3/core.h > > > > > index 341e4c73cb2e..df2e111aa848 100644 > > > > > --- a/drivers/usb/dwc3/core.h > > > > > +++ b/drivers/usb/dwc3/core.h > > > > > @@ -33,6 +33,12 @@ > > > > > #include <linux/power_supply.h> > > > > > +/* > > > > > + * Maximum number of ports currently supported for multiport > > > > > + * controllers. > > > > > > > > This macro here is being used per USB2 vs USB3 ports rather than USB2 + > > > > USB3, unlike the xHCI MAXPORTS. You can clarify in the comment and > > > > rename the macro to avoid any confusion. You can also create 2 separate > > > > macros for number of USB2 and USB3 ports even if they share the same > > > > value. > > > > > > > > As noted[*], we support have different max number of usb2 ports vs usb3 > > > > ports. I would suggest splitting the macros. > > > > > > > > > > Hi Thinh, > > > > > > This macro was intended only to identify how many USB2 (or USB3) Phy's were > > > serviced/operated by this driver, not how many logical ports present (like > > > > That's not what you described in the comment right above the macro... > > > > > in xHCI). I don't think it would be confusing currently given that it is > > > only used to identify number of generic phy instances to allocate and not > > > used for any other purpose. Once the num_usb2_ports and num_usb3_ports are > > > read by get_num_ports(...) call, they directly indicate how many ports are > > > > Those fields are clear. But for DWC3_MAX_PORTS, based on the name and > > comment of the macro, it's not clear. > > > > > HS and SS respectively. Keeping the same in mind, I returned ENOMEM above > > > (as you mentioned) because we don't allocate more than DWC3_MAX_PORTS and if > > > the number of hs or ss ports is more than that, we simply return ENOMEM > > > saying the driver doesn't support operating those many phy's. > > > > The error code -ENOMEM indicates out of memory failure. The check > > condition dwc->num_usb2_ports > DWC3_MAX_PORTS indicates invalid config. > > There's no allocation in that check. > > > > > > > > > [*] https://urldefense.com/v3/__https://lore.kernel.org/linux-usb/20230801013031.ft3zpoatiyfegmh6@synopsys.com/__;!!A4F2R9G_pg!azHqgm92ENkFQrpv6Fhs6PCe210VGOAIrsuGFhrgmfaor8N_kWLu6rxkPpbeCBTLL4NbUpOWlQ0ufmP9DFwO9iFc0XdSEg$ > > > > > > > > > + */ > > > > > +#define DWC3_MAX_PORTS 4 > > > > > + > > > > > > > > > > > > > But it's not a big issue whether you decided to push a new version or a > > > > create a separate patch for the comments above. Here's my Ack: > > > > > > > > > > Since this is not a bug, I would prefer to make a separate patch to rename > > > the macros. (If that is fine). > > > > > > > That is fine with me. Thanks for your effort pursuing and continue > > working on this series. > > > > Thanks Thinh. If there are no other issues, I will wait till Greg picks the > series up. Thanks for the reviews throughout the series. I can't take it yet, based on the review of this patch, so I'll wait for a new version of the series. thanks, greg k-h
diff --git a/drivers/usb/dwc3/core.c b/drivers/usb/dwc3/core.c index 1a3d8a9beea8..1f4f228c970b 100644 --- a/drivers/usb/dwc3/core.c +++ b/drivers/usb/dwc3/core.c @@ -124,6 +124,7 @@ static void __dwc3_set_mode(struct work_struct *work) int ret; u32 reg; u32 desired_dr_role; + int i; mutex_lock(&dwc->mutex); spin_lock_irqsave(&dwc->lock, flags); @@ -201,8 +202,10 @@ static void __dwc3_set_mode(struct work_struct *work) } else { if (dwc->usb2_phy) otg_set_vbus(dwc->usb2_phy->otg, true); - phy_set_mode(dwc->usb2_generic_phy, PHY_MODE_USB_HOST); - phy_set_mode(dwc->usb3_generic_phy, PHY_MODE_USB_HOST); + for (i = 0; i < dwc->num_usb2_ports; i++) { + phy_set_mode(dwc->usb2_generic_phy[i], PHY_MODE_USB_HOST); + phy_set_mode(dwc->usb3_generic_phy[i], PHY_MODE_USB_HOST); + } if (dwc->dis_split_quirk) { reg = dwc3_readl(dwc->regs, DWC3_GUCTL3); reg |= DWC3_GUCTL3_SPLITDISABLE; @@ -217,8 +220,8 @@ static void __dwc3_set_mode(struct work_struct *work) if (dwc->usb2_phy) otg_set_vbus(dwc->usb2_phy->otg, false); - phy_set_mode(dwc->usb2_generic_phy, PHY_MODE_USB_DEVICE); - phy_set_mode(dwc->usb3_generic_phy, PHY_MODE_USB_DEVICE); + phy_set_mode(dwc->usb2_generic_phy[0], PHY_MODE_USB_DEVICE); + phy_set_mode(dwc->usb3_generic_phy[0], PHY_MODE_USB_DEVICE); ret = dwc3_gadget_init(dwc); if (ret) @@ -589,22 +592,14 @@ static int dwc3_core_ulpi_init(struct dwc3 *dwc) return ret; } -/** - * dwc3_phy_setup - Configure USB PHY Interface of DWC3 Core - * @dwc: Pointer to our controller context structure - * - * Returns 0 on success. The USB PHY interfaces are configured but not - * initialized. The PHY interfaces and the PHYs get initialized together with - * the core in dwc3_core_init. - */ -static int dwc3_phy_setup(struct dwc3 *dwc) +static int dwc3_ss_phy_setup(struct dwc3 *dwc, int index) { unsigned int hw_mode; u32 reg; hw_mode = DWC3_GHWPARAMS0_MODE(dwc->hwparams.hwparams0); - reg = dwc3_readl(dwc->regs, DWC3_GUSB3PIPECTL(0)); + reg = dwc3_readl(dwc->regs, DWC3_GUSB3PIPECTL(index)); /* * Make sure UX_EXIT_PX is cleared as that causes issues with some @@ -659,9 +654,19 @@ static int dwc3_phy_setup(struct dwc3 *dwc) if (dwc->dis_del_phy_power_chg_quirk) reg &= ~DWC3_GUSB3PIPECTL_DEPOCHANGE; - dwc3_writel(dwc->regs, DWC3_GUSB3PIPECTL(0), reg); + dwc3_writel(dwc->regs, DWC3_GUSB3PIPECTL(index), reg); - reg = dwc3_readl(dwc->regs, DWC3_GUSB2PHYCFG(0)); + return 0; +} + +static int dwc3_hs_phy_setup(struct dwc3 *dwc, int index) +{ + unsigned int hw_mode; + u32 reg; + + hw_mode = DWC3_GHWPARAMS0_MODE(dwc->hwparams.hwparams0); + + reg = dwc3_readl(dwc->regs, DWC3_GUSB2PHYCFG(index)); /* Select the HS PHY interface */ switch (DWC3_GHWPARAMS3_HSPHY_IFC(dwc->hwparams.hwparams3)) { @@ -673,7 +678,7 @@ static int dwc3_phy_setup(struct dwc3 *dwc) } else if (dwc->hsphy_interface && !strncmp(dwc->hsphy_interface, "ulpi", 4)) { reg |= DWC3_GUSB2PHYCFG_ULPI_UTMI; - dwc3_writel(dwc->regs, DWC3_GUSB2PHYCFG(0), reg); + dwc3_writel(dwc->regs, DWC3_GUSB2PHYCFG(index), reg); } else { /* Relying on default value. */ if (!(reg & DWC3_GUSB2PHYCFG_ULPI_UTMI)) @@ -740,7 +745,35 @@ static int dwc3_phy_setup(struct dwc3 *dwc) if (dwc->ulpi_ext_vbus_drv) reg |= DWC3_GUSB2PHYCFG_ULPIEXTVBUSDRV; - dwc3_writel(dwc->regs, DWC3_GUSB2PHYCFG(0), reg); + dwc3_writel(dwc->regs, DWC3_GUSB2PHYCFG(index), reg); + + return 0; +} + +/** + * dwc3_phy_setup - Configure USB PHY Interface of DWC3 Core + * @dwc: Pointer to our controller context structure + * + * Returns 0 on success. The USB PHY interfaces are configured but not + * initialized. The PHY interfaces and the PHYs get initialized together with + * the core in dwc3_core_init. + */ +static int dwc3_phy_setup(struct dwc3 *dwc) +{ + int i; + int ret; + + for (i = 0; i < dwc->num_usb3_ports; i++) { + ret = dwc3_ss_phy_setup(dwc, i); + if (ret) + return ret; + } + + for (i = 0; i < dwc->num_usb2_ports; i++) { + ret = dwc3_hs_phy_setup(dwc, i); + if (ret) + return ret; + } return 0; } @@ -748,23 +781,32 @@ static int dwc3_phy_setup(struct dwc3 *dwc) static int dwc3_phy_init(struct dwc3 *dwc) { int ret; + int i; + int j; usb_phy_init(dwc->usb2_phy); usb_phy_init(dwc->usb3_phy); - ret = phy_init(dwc->usb2_generic_phy); - if (ret < 0) - goto err_shutdown_usb3_phy; + for (i = 0; i < dwc->num_usb2_ports; i++) { + ret = phy_init(dwc->usb2_generic_phy[i]); + if (ret < 0) + goto err_exit_phy; - ret = phy_init(dwc->usb3_generic_phy); - if (ret < 0) - goto err_exit_usb2_phy; + ret = phy_init(dwc->usb3_generic_phy[i]); + if (ret < 0) { + phy_exit(dwc->usb2_generic_phy[i]); + goto err_exit_phy; + } + } return 0; -err_exit_usb2_phy: - phy_exit(dwc->usb2_generic_phy); -err_shutdown_usb3_phy: +err_exit_phy: + for (j = i - 1; j >= 0; j--) { + phy_exit(dwc->usb3_generic_phy[j]); + phy_exit(dwc->usb2_generic_phy[j]); + } + usb_phy_shutdown(dwc->usb3_phy); usb_phy_shutdown(dwc->usb2_phy); @@ -773,8 +815,12 @@ static int dwc3_phy_init(struct dwc3 *dwc) static void dwc3_phy_exit(struct dwc3 *dwc) { - phy_exit(dwc->usb3_generic_phy); - phy_exit(dwc->usb2_generic_phy); + int i; + + for (i = 0; i < dwc->num_usb2_ports; i++) { + phy_exit(dwc->usb3_generic_phy[i]); + phy_exit(dwc->usb2_generic_phy[i]); + } usb_phy_shutdown(dwc->usb3_phy); usb_phy_shutdown(dwc->usb2_phy); @@ -783,23 +829,32 @@ static void dwc3_phy_exit(struct dwc3 *dwc) static int dwc3_phy_power_on(struct dwc3 *dwc) { int ret; + int i; + int j; usb_phy_set_suspend(dwc->usb2_phy, 0); usb_phy_set_suspend(dwc->usb3_phy, 0); - ret = phy_power_on(dwc->usb2_generic_phy); - if (ret < 0) - goto err_suspend_usb3_phy; + for (i = 0; i < dwc->num_usb2_ports; i++) { + ret = phy_power_on(dwc->usb2_generic_phy[i]); + if (ret < 0) + goto err_power_off_phy; - ret = phy_power_on(dwc->usb3_generic_phy); - if (ret < 0) - goto err_power_off_usb2_phy; + ret = phy_power_on(dwc->usb3_generic_phy[i]); + if (ret < 0) { + phy_power_off(dwc->usb2_generic_phy[i]); + goto err_power_off_phy; + } + } return 0; -err_power_off_usb2_phy: - phy_power_off(dwc->usb2_generic_phy); -err_suspend_usb3_phy: +err_power_off_phy: + for (j = i - 1; j >= 0; j--) { + phy_power_off(dwc->usb3_generic_phy[j]); + phy_power_off(dwc->usb2_generic_phy[j]); + } + usb_phy_set_suspend(dwc->usb3_phy, 1); usb_phy_set_suspend(dwc->usb2_phy, 1); @@ -808,8 +863,12 @@ static int dwc3_phy_power_on(struct dwc3 *dwc) static void dwc3_phy_power_off(struct dwc3 *dwc) { - phy_power_off(dwc->usb3_generic_phy); - phy_power_off(dwc->usb2_generic_phy); + int i; + + for (i = 0; i < dwc->num_usb2_ports; i++) { + phy_power_off(dwc->usb3_generic_phy[i]); + phy_power_off(dwc->usb2_generic_phy[i]); + } usb_phy_set_suspend(dwc->usb3_phy, 1); usb_phy_set_suspend(dwc->usb2_phy, 1); @@ -1201,6 +1260,7 @@ static int dwc3_core_init(struct dwc3 *dwc) unsigned int hw_mode; u32 reg; int ret; + int i; hw_mode = DWC3_GHWPARAMS0_MODE(dwc->hwparams.hwparams0); @@ -1244,15 +1304,19 @@ static int dwc3_core_init(struct dwc3 *dwc) if (hw_mode == DWC3_GHWPARAMS0_MODE_DRD && !DWC3_VER_IS_WITHIN(DWC3, ANY, 194A)) { if (!dwc->dis_u3_susphy_quirk) { - reg = dwc3_readl(dwc->regs, DWC3_GUSB3PIPECTL(0)); - reg |= DWC3_GUSB3PIPECTL_SUSPHY; - dwc3_writel(dwc->regs, DWC3_GUSB3PIPECTL(0), reg); + for (i = 0; i < dwc->num_usb3_ports; i++) { + reg = dwc3_readl(dwc->regs, DWC3_GUSB3PIPECTL(i)); + reg |= DWC3_GUSB3PIPECTL_SUSPHY; + dwc3_writel(dwc->regs, DWC3_GUSB3PIPECTL(i), reg); + } } if (!dwc->dis_u2_susphy_quirk) { - reg = dwc3_readl(dwc->regs, DWC3_GUSB2PHYCFG(0)); - reg |= DWC3_GUSB2PHYCFG_SUSPHY; - dwc3_writel(dwc->regs, DWC3_GUSB2PHYCFG(0), reg); + for (i = 0; i < dwc->num_usb2_ports; i++) { + reg = dwc3_readl(dwc->regs, DWC3_GUSB2PHYCFG(i)); + reg |= DWC3_GUSB2PHYCFG_SUSPHY; + dwc3_writel(dwc->regs, DWC3_GUSB2PHYCFG(i), reg); + } } } @@ -1372,7 +1436,9 @@ static int dwc3_core_get_phy(struct dwc3 *dwc) { struct device *dev = dwc->dev; struct device_node *node = dev->of_node; + char phy_name[9]; int ret; + int i; if (node) { dwc->usb2_phy = devm_usb_get_phy_by_phandle(dev, "usb-phy", 0); @@ -1398,22 +1464,36 @@ static int dwc3_core_get_phy(struct dwc3 *dwc) return dev_err_probe(dev, ret, "no usb3 phy configured\n"); } - dwc->usb2_generic_phy = devm_phy_get(dev, "usb2-phy"); - if (IS_ERR(dwc->usb2_generic_phy)) { - ret = PTR_ERR(dwc->usb2_generic_phy); - if (ret == -ENOSYS || ret == -ENODEV) - dwc->usb2_generic_phy = NULL; + for (i = 0; i < dwc->num_usb2_ports; i++) { + if (dwc->num_usb2_ports == 1) + sprintf(phy_name, "usb2-phy"); else - return dev_err_probe(dev, ret, "no usb2 phy configured\n"); - } + sprintf(phy_name, "usb2-%d", i); + + dwc->usb2_generic_phy[i] = devm_phy_get(dev, phy_name); + if (IS_ERR(dwc->usb2_generic_phy[i])) { + ret = PTR_ERR(dwc->usb2_generic_phy[i]); + if (ret == -ENOSYS || ret == -ENODEV) + dwc->usb2_generic_phy[i] = NULL; + else + return dev_err_probe(dev, ret, "failed to lookup phy %s\n", + phy_name); + } - dwc->usb3_generic_phy = devm_phy_get(dev, "usb3-phy"); - if (IS_ERR(dwc->usb3_generic_phy)) { - ret = PTR_ERR(dwc->usb3_generic_phy); - if (ret == -ENOSYS || ret == -ENODEV) - dwc->usb3_generic_phy = NULL; + if (dwc->num_usb2_ports == 1) + sprintf(phy_name, "usb3-phy"); else - return dev_err_probe(dev, ret, "no usb3 phy configured\n"); + sprintf(phy_name, "usb3-%d", i); + + dwc->usb3_generic_phy[i] = devm_phy_get(dev, phy_name); + if (IS_ERR(dwc->usb3_generic_phy[i])) { + ret = PTR_ERR(dwc->usb3_generic_phy[i]); + if (ret == -ENOSYS || ret == -ENODEV) + dwc->usb3_generic_phy[i] = NULL; + else + return dev_err_probe(dev, ret, "failed to lookup phy %s\n", + phy_name); + } } return 0; @@ -1423,6 +1503,7 @@ static int dwc3_core_init_mode(struct dwc3 *dwc) { struct device *dev = dwc->dev; int ret; + int i; switch (dwc->dr_mode) { case USB_DR_MODE_PERIPHERAL: @@ -1430,8 +1511,8 @@ static int dwc3_core_init_mode(struct dwc3 *dwc) if (dwc->usb2_phy) otg_set_vbus(dwc->usb2_phy->otg, false); - phy_set_mode(dwc->usb2_generic_phy, PHY_MODE_USB_DEVICE); - phy_set_mode(dwc->usb3_generic_phy, PHY_MODE_USB_DEVICE); + phy_set_mode(dwc->usb2_generic_phy[0], PHY_MODE_USB_DEVICE); + phy_set_mode(dwc->usb3_generic_phy[0], PHY_MODE_USB_DEVICE); ret = dwc3_gadget_init(dwc); if (ret) @@ -1442,8 +1523,10 @@ static int dwc3_core_init_mode(struct dwc3 *dwc) if (dwc->usb2_phy) otg_set_vbus(dwc->usb2_phy->otg, true); - phy_set_mode(dwc->usb2_generic_phy, PHY_MODE_USB_HOST); - phy_set_mode(dwc->usb3_generic_phy, PHY_MODE_USB_HOST); + for (i = 0; i < dwc->num_usb2_ports; i++) { + phy_set_mode(dwc->usb2_generic_phy[i], PHY_MODE_USB_HOST); + phy_set_mode(dwc->usb3_generic_phy[i], PHY_MODE_USB_HOST); + } ret = dwc3_host_init(dwc); if (ret) @@ -1937,6 +2020,10 @@ static int dwc3_get_num_ports(struct dwc3 *dwc) iounmap(base); + if (dwc->num_usb2_ports > DWC3_MAX_PORTS || + dwc->num_usb3_ports > DWC3_MAX_PORTS) + return -ENOMEM; + return 0; } @@ -2174,6 +2261,7 @@ static int dwc3_suspend_common(struct dwc3 *dwc, pm_message_t msg) { unsigned long flags; u32 reg; + int i; switch (dwc->current_dr_role) { case DWC3_GCTL_PRTCAP_DEVICE: @@ -2192,17 +2280,21 @@ static int dwc3_suspend_common(struct dwc3 *dwc, pm_message_t msg) /* Let controller to suspend HSPHY before PHY driver suspends */ if (dwc->dis_u2_susphy_quirk || dwc->dis_enblslpm_quirk) { - reg = dwc3_readl(dwc->regs, DWC3_GUSB2PHYCFG(0)); - reg |= DWC3_GUSB2PHYCFG_ENBLSLPM | - DWC3_GUSB2PHYCFG_SUSPHY; - dwc3_writel(dwc->regs, DWC3_GUSB2PHYCFG(0), reg); + for (i = 0; i < dwc->num_usb2_ports; i++) { + reg = dwc3_readl(dwc->regs, DWC3_GUSB2PHYCFG(i)); + reg |= DWC3_GUSB2PHYCFG_ENBLSLPM | + DWC3_GUSB2PHYCFG_SUSPHY; + dwc3_writel(dwc->regs, DWC3_GUSB2PHYCFG(i), reg); + } /* Give some time for USB2 PHY to suspend */ usleep_range(5000, 6000); } - phy_pm_runtime_put_sync(dwc->usb2_generic_phy); - phy_pm_runtime_put_sync(dwc->usb3_generic_phy); + for (i = 0; i < dwc->num_usb2_ports; i++) { + phy_pm_runtime_put_sync(dwc->usb2_generic_phy[i]); + phy_pm_runtime_put_sync(dwc->usb3_generic_phy[i]); + } break; case DWC3_GCTL_PRTCAP_OTG: /* do nothing during runtime_suspend */ @@ -2232,6 +2324,7 @@ static int dwc3_resume_common(struct dwc3 *dwc, pm_message_t msg) unsigned long flags; int ret; u32 reg; + int i; switch (dwc->current_dr_role) { case DWC3_GCTL_PRTCAP_DEVICE: @@ -2251,17 +2344,21 @@ static int dwc3_resume_common(struct dwc3 *dwc, pm_message_t msg) break; } /* Restore GUSB2PHYCFG bits that were modified in suspend */ - reg = dwc3_readl(dwc->regs, DWC3_GUSB2PHYCFG(0)); - if (dwc->dis_u2_susphy_quirk) - reg &= ~DWC3_GUSB2PHYCFG_SUSPHY; + for (i = 0; i < dwc->num_usb2_ports; i++) { + reg = dwc3_readl(dwc->regs, DWC3_GUSB2PHYCFG(i)); + if (dwc->dis_u2_susphy_quirk) + reg &= ~DWC3_GUSB2PHYCFG_SUSPHY; - if (dwc->dis_enblslpm_quirk) - reg &= ~DWC3_GUSB2PHYCFG_ENBLSLPM; + if (dwc->dis_enblslpm_quirk) + reg &= ~DWC3_GUSB2PHYCFG_ENBLSLPM; - dwc3_writel(dwc->regs, DWC3_GUSB2PHYCFG(0), reg); + dwc3_writel(dwc->regs, DWC3_GUSB2PHYCFG(i), reg); + } - phy_pm_runtime_get_sync(dwc->usb2_generic_phy); - phy_pm_runtime_get_sync(dwc->usb3_generic_phy); + for (i = 0; i < dwc->num_usb2_ports; i++) { + phy_pm_runtime_get_sync(dwc->usb2_generic_phy[i]); + phy_pm_runtime_get_sync(dwc->usb3_generic_phy[i]); + } break; case DWC3_GCTL_PRTCAP_OTG: /* nothing to do on runtime_resume */ diff --git a/drivers/usb/dwc3/core.h b/drivers/usb/dwc3/core.h index 341e4c73cb2e..df2e111aa848 100644 --- a/drivers/usb/dwc3/core.h +++ b/drivers/usb/dwc3/core.h @@ -33,6 +33,12 @@ #include <linux/power_supply.h> +/* + * Maximum number of ports currently supported for multiport + * controllers. + */ +#define DWC3_MAX_PORTS 4 + #define DWC3_MSG_MAX 500 /* Global constants */ @@ -1037,8 +1043,8 @@ struct dwc3_scratchpad_array { * @usb_psy: pointer to power supply interface. * @usb2_phy: pointer to USB2 PHY * @usb3_phy: pointer to USB3 PHY - * @usb2_generic_phy: pointer to USB2 PHY - * @usb3_generic_phy: pointer to USB3 PHY + * @usb2_generic_phy: pointer to array of USB2 PHYs + * @usb3_generic_phy: pointer to array of USB3 PHYs * @num_usb2_ports: number of USB2 ports * @num_usb3_ports: number of USB3 ports * @phys_ready: flag to indicate that PHYs are ready @@ -1186,8 +1192,8 @@ struct dwc3 { struct usb_phy *usb2_phy; struct usb_phy *usb3_phy; - struct phy *usb2_generic_phy; - struct phy *usb3_generic_phy; + struct phy *usb2_generic_phy[DWC3_MAX_PORTS]; + struct phy *usb3_generic_phy[DWC3_MAX_PORTS]; u8 num_usb2_ports; u8 num_usb3_ports; diff --git a/drivers/usb/dwc3/drd.c b/drivers/usb/dwc3/drd.c index 57ddd2e43022..d76ae676783c 100644 --- a/drivers/usb/dwc3/drd.c +++ b/drivers/usb/dwc3/drd.c @@ -331,6 +331,7 @@ void dwc3_otg_update(struct dwc3 *dwc, bool ignore_idstatus) u32 reg; int id; unsigned long flags; + int i; if (dwc->dr_mode != USB_DR_MODE_OTG) return; @@ -386,9 +387,12 @@ void dwc3_otg_update(struct dwc3 *dwc, bool ignore_idstatus) } else { if (dwc->usb2_phy) otg_set_vbus(dwc->usb2_phy->otg, true); - if (dwc->usb2_generic_phy) - phy_set_mode(dwc->usb2_generic_phy, - PHY_MODE_USB_HOST); + for (i = 0; i < dwc->num_usb2_ports; i++) { + if (dwc->usb2_generic_phy[i]) { + phy_set_mode(dwc->usb2_generic_phy[i], + PHY_MODE_USB_HOST); + } + } } break; case DWC3_OTG_ROLE_DEVICE: @@ -400,9 +404,8 @@ void dwc3_otg_update(struct dwc3 *dwc, bool ignore_idstatus) if (dwc->usb2_phy) otg_set_vbus(dwc->usb2_phy->otg, false); - if (dwc->usb2_generic_phy) - phy_set_mode(dwc->usb2_generic_phy, - PHY_MODE_USB_DEVICE); + if (dwc->usb2_generic_phy[0]) + phy_set_mode(dwc->usb2_generic_phy[0], PHY_MODE_USB_DEVICE); ret = dwc3_gadget_init(dwc); if (ret) dev_err(dwc->dev, "failed to initialize peripheral\n");