| Message ID | 20240422-v6-9-topic-imx93-eqos-rmii-v1-1-30151fca43d2@pengutronix.de (mailing list archive) |
|---|---|
| State | Changes Requested |
| Delegated to: | Netdev Maintainers |
| Headers | show |
| Series | arm64: mx93: etherrnet: set TX_CLK in RMII mode | expand |
On Mon, Apr 22, 2024 at 10:46:17AM +0200, Steffen Trumtrar wrote: > When the eQOS on the i.MX93 is used in RMII mode, the TX_CLK must be set > to output mode. To do this, the ENET_CLK_SEL register must be accessed. > This register is located in a GPR register space. > > Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de> > --- > Documentation/devicetree/bindings/net/nxp,dwmac-imx.yaml | 10 ++++++++++ > 1 file changed, 10 insertions(+) > > diff --git a/Documentation/devicetree/bindings/net/nxp,dwmac-imx.yaml b/Documentation/devicetree/bindings/net/nxp,dwmac-imx.yaml > index 4c01cae7c93a7..1d1c8b90da871 100644 > --- a/Documentation/devicetree/bindings/net/nxp,dwmac-imx.yaml > +++ b/Documentation/devicetree/bindings/net/nxp,dwmac-imx.yaml > @@ -56,6 +56,16 @@ properties: > - tx > - mem > > + enet_clk_sel: Krzysztof will likely write the same in a moment, but anyway: Please no underscores in property names, see https://docs.kernel.org/devicetree/bindings/dts-coding-style.html Sascha
On 22/04/2024 10:46, Steffen Trumtrar wrote: > When the eQOS on the i.MX93 is used in RMII mode, the TX_CLK must be set > to output mode. To do this, the ENET_CLK_SEL register must be accessed. > This register is located in a GPR register space. > > Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de> > --- > Documentation/devicetree/bindings/net/nxp,dwmac-imx.yaml | 10 ++++++++++ > 1 file changed, 10 insertions(+) > > diff --git a/Documentation/devicetree/bindings/net/nxp,dwmac-imx.yaml b/Documentation/devicetree/bindings/net/nxp,dwmac-imx.yaml > index 4c01cae7c93a7..1d1c8b90da871 100644 > --- a/Documentation/devicetree/bindings/net/nxp,dwmac-imx.yaml > +++ b/Documentation/devicetree/bindings/net/nxp,dwmac-imx.yaml > @@ -56,6 +56,16 @@ properties: > - tx > - mem > > + enet_clk_sel: Except what Sasha wrote, also missing vendor prefix. That's not a generic property. > + $ref: /schemas/types.yaml#/definitions/phandle-array > + items: > + - items: > + - description: phandle to the GPR syscon > + - description: the offset of the GPR register > + description: > + Should be phandle/offset pair. The phandle to the syscon node which > + encompases the GPR register, and the offset of the GPR register. That's redundant. Provide full description in the items. You can say here what is the purpose of this phandle. Best regards, Krzysztof
On 22/04/2024 10:46, Steffen Trumtrar wrote: > When the eQOS on the i.MX93 is used in RMII mode, the TX_CLK must be set > to output mode. To do this, the ENET_CLK_SEL register must be accessed. > This register is located in a GPR register space. > > Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de> Please use subject prefixes matching the subsystem. You can get them for example with `git log --oneline -- DIRECTORY_OR_FILE` on the directory your patch is touching. Best regards, Krzysztof
> + enet_clk_sel: > + $ref: /schemas/types.yaml#/definitions/phandle-array > + items: > + - items: > + - description: phandle to the GPR syscon > + - description: the offset of the GPR register > + description: > + Should be phandle/offset pair. The phandle to the syscon node which > + encompases the GPR register, and the offset of the GPR register. > + net/nxp,dwmac-imx.yaml intf_mode: $ref: /schemas/types.yaml#/definitions/phandle-array items: - items: - description: phandle to the GPR syscon - description: the offset of the GPR register description: Should be phandle/offset pair. The phandle to the syscon node which encompases the GPR register, and the offset of the GPR register. dma/fsl,imx-sdma.yaml gpr: $ref: /schemas/types.yaml#/definitions/phandle description: The phandle to the General Purpose Register (GPR) node memory-controllers/fsl/fsl,imx-weim.yaml fsl,weim-cs-gpr: $ref: /schemas/types.yaml#/definitions/phandle description: | Phandle to the system General Purpose Register controller that contains WEIM CS GPR register, e.g. IOMUXC_GPR1 on i.MX6Q. IOMUXC_GPR1[11:0] should be set up as one of the following 4 possible values depending on the CS space configuration. IOMUXC_GPR1[11:0] CS0 CS1 CS2 CS3 --------------------------------------------- 05 128M 0M 0M 0M 033 64M 64M 0M 0M 0113 64M 32M 32M 0M 01111 32M 32M 32M 32M In case that the property is absent, the reset value or what bootloader sets up in IOMUXC_GPR1[11:0] will be used. How about defining that the General Purpose Registers property is once, rather than per device which needs access to it? Andrew
On 2024-04-22 at 10:58 +02, Sascha Hauer <s.hauer@pengutronix.de> wrote: > On Mon, Apr 22, 2024 at 10:46:17AM +0200, Steffen Trumtrar wrote: > > When the eQOS on the i.MX93 is used in RMII mode, the TX_CLK must be set to output mode. To do this, the ENET_CLK_SEL register must be accessed. This register is located in a GPR register space. Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de> --- > > Documentation/devicetree/bindings/net/nxp,dwmac-imx.yaml | 10 ++++++++++ 1 file changed, 10 insertions(+) > > diff --git a/Documentation/devicetree/bindings/net/nxp,dwmac-imx.yaml b/Documentation/devicetree/bindings/net/nxp,dwmac-imx.yaml index 4c01cae7c93a7..1d1c8b90da871 100644 --- a/Documentation/devicetree/bindings/net/nxp,dwmac-imx.yaml +++ b/Documentation/devicetree/bindings/net/nxp,dwmac-imx.yaml @@ -56,6 +56,16 @@ properties: > > - tx - mem > > > > + enet_clk_sel: > Krzysztof will likely write the same in a moment, but anyway: Please no underscores in property names, see https://docs.kernel.org/devicetree/bindings/dts-coding-style.html That's what you get, when you just mindlessly copy existing property names :( You are right, of course. Thanks Steffen
diff --git a/Documentation/devicetree/bindings/net/nxp,dwmac-imx.yaml b/Documentation/devicetree/bindings/net/nxp,dwmac-imx.yaml index 4c01cae7c93a7..1d1c8b90da871 100644 --- a/Documentation/devicetree/bindings/net/nxp,dwmac-imx.yaml +++ b/Documentation/devicetree/bindings/net/nxp,dwmac-imx.yaml @@ -56,6 +56,16 @@ properties: - tx - mem + enet_clk_sel: + $ref: /schemas/types.yaml#/definitions/phandle-array + items: + - items: + - description: phandle to the GPR syscon + - description: the offset of the GPR register + description: + Should be phandle/offset pair. The phandle to the syscon node which + encompases the GPR register, and the offset of the GPR register. + intf_mode: $ref: /schemas/types.yaml#/definitions/phandle-array items:
When the eQOS on the i.MX93 is used in RMII mode, the TX_CLK must be set to output mode. To do this, the ENET_CLK_SEL register must be accessed. This register is located in a GPR register space. Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de> --- Documentation/devicetree/bindings/net/nxp,dwmac-imx.yaml | 10 ++++++++++ 1 file changed, 10 insertions(+)