mbox series

[v8,0/9] Make the SMMUv3 CD logic match the new STE design (part 2a/3)

Message ID 0-v8-4c4298c63951+13484-smmuv3_newapi_p2_jgg@nvidia.com (mailing list archive)
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Series Make the SMMUv3 CD logic match the new STE design (part 2a/3) | expand

Message

Jason Gunthorpe April 23, 2024, 1:14 p.m. UTC
This is split out from the larger part two which aimes to rework the PASID
related code.

No new functionality is introduced in theses commits, it just reorganizes
the CD logic to follow the same design of the new STE logic using make
functions and a single programming flow without leaking details to
callers.

CD does not have as strong a need for this as STE, but all the code exists
and continuing with the same pattern makes for fewer things to understand
inside the driver.

The following PASID code makes use of this to rethread how the CD
programming works to take a caller created struct arm_smmu_cd and then
stick whatever that is into the live CD entry. This allows the actual
PASID and CD logic to be general and then the PAGING and SVA domain types
can sit on top of it.

There are four kinds of CDs:
 - Blocking (ie cleared)
 - S1 PAGING
 - SVA
 - SVA with a released MM (all fault)

The last two have to transition hitlessly.

v8:
 - Remove ops->v_bit and just use entry[0] = 0
 - Revise commit messages
 - Revise comment in arm_smmu_get_cd_used()
 - Move hunks removing code from arm_smmu_write_ctx_desc() earlier for
   clarity
 - Consistently avoid CTXDESC_SPLIT and remove the macro
 - Don't check master->stall_enabled for the STALL_FORCE mm release
 - Fixup rand config failures on the kunit
 - Use VISIBLE_IF_KUNIT
 - Move more mock structs to .data to avoid stack frame size warnings
v7: https://lore.kernel.org/r/0-v7-cb149db3a320+3b5-smmuv3_newapi_p2_jgg@nvidia.com
 - Rebase on Will's for-next & v6.9-rc2
 - Split series in half
 - Include the kunit test
 - Update comments to refer to the STE & CD in the writer logic
v6: https://lore.kernel.org/r/0-v6-228e7adf25eb+4155-smmuv3_newapi_p2_jgg@nvidia.com

Jason Gunthorpe (9):
  iommu/arm-smmu-v3: Add an ops indirection to the STE code
  iommu/arm-smmu-v3: Make CD programming use arm_smmu_write_entry()
  iommu/arm-smmu-v3: Move the CD generation for S1 domains into a
    function
  iommu/arm-smmu-v3: Consolidate clearing a CD table entry
  iommu/arm-smmu-v3: Make arm_smmu_alloc_cd_ptr()
  iommu/arm-smmu-v3: Allocate the CD table entry in advance
  iommu/arm-smmu-v3: Move the CD generation for SVA into a function
  iommu/arm-smmu-v3: Build the whole CD in arm_smmu_make_s1_cd()
  iommu/arm-smmu-v3: Add unit tests for arm_smmu_write_entry

 drivers/iommu/Kconfig                         |  13 +-
 drivers/iommu/arm/arm-smmu-v3/Makefile        |   1 +
 .../iommu/arm/arm-smmu-v3/arm-smmu-v3-sva.c   | 164 ++++--
 .../iommu/arm/arm-smmu-v3/arm-smmu-v3-test.c  | 465 ++++++++++++++++
 drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c   | 504 ++++++++++--------
 drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h   |  53 +-
 6 files changed, 903 insertions(+), 297 deletions(-)
 create mode 100644 drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3-test.c


base-commit: e8e4398d53f98be7ac48e0bda9ea6e26df24136d

Comments

Will Deacon April 30, 2024, 5:18 p.m. UTC | #1
Hi Jason,

On Tue, Apr 23, 2024 at 10:14:05AM -0300, Jason Gunthorpe wrote:
> This is split out from the larger part two which aimes to rework the PASID
> related code.
> 
> No new functionality is introduced in theses commits, it just reorganizes
> the CD logic to follow the same design of the new STE logic using make
> functions and a single programming flow without leaking details to
> callers.
> 
> CD does not have as strong a need for this as STE, but all the code exists
> and continuing with the same pattern makes for fewer things to understand
> inside the driver.
> 
> The following PASID code makes use of this to rethread how the CD
> programming works to take a caller created struct arm_smmu_cd and then
> stick whatever that is into the live CD entry. This allows the actual
> PASID and CD logic to be general and then the PAGING and SVA domain types
> can sit on top of it.
> 
> There are four kinds of CDs:
>  - Blocking (ie cleared)
>  - S1 PAGING
>  - SVA
>  - SVA with a released MM (all fault)
> 
> The last two have to transition hitlessly.
> 
> v8:
>  - Remove ops->v_bit and just use entry[0] = 0
>  - Revise commit messages
>  - Revise comment in arm_smmu_get_cd_used()
>  - Move hunks removing code from arm_smmu_write_ctx_desc() earlier for
>    clarity
>  - Consistently avoid CTXDESC_SPLIT and remove the macro
>  - Don't check master->stall_enabled for the STALL_FORCE mm release
>  - Fixup rand config failures on the kunit
>  - Use VISIBLE_IF_KUNIT
>  - Move more mock structs to .data to avoid stack frame size warnings

I think Mostafa left some comments on patch 2 of your v7 after you had
posted the v8. Please could you spin a v9 with that addressed so I start
picking things up?

Cheers,

Will