diff mbox series

[02/12] accel/ivpu: Add sched_mode module param

Message ID 20240508132106.2387464-3-jacek.lawrynowicz@linux.intel.com (mailing list archive)
State New, archived
Headers show
Series accel/ivpu: Changes for 6.10 | expand

Commit Message

Jacek Lawrynowicz May 8, 2024, 1:20 p.m. UTC
From: "Wachowski, Karol" <karol.wachowski@intel.com>

This param will be used to enable/disable HWS (hardware scheduler).
The HWS is a FW side feature and may not be available on all
HW generations and FW versions.

Signed-off-by: Wachowski, Karol <karol.wachowski@intel.com>
Signed-off-by: Jacek Lawrynowicz <jacek.lawrynowicz@linux.intel.com>
---
 drivers/accel/ivpu/ivpu_drv.c     | 4 ++++
 drivers/accel/ivpu/ivpu_drv.h     | 1 +
 drivers/accel/ivpu/ivpu_hw.h      | 3 ++-
 drivers/accel/ivpu/ivpu_hw_37xx.c | 1 +
 drivers/accel/ivpu/ivpu_hw_40xx.c | 3 ++-
 5 files changed, 10 insertions(+), 2 deletions(-)

Comments

Jeffrey Hugo May 10, 2024, 4:30 p.m. UTC | #1
On 5/8/2024 7:20 AM, Jacek Lawrynowicz wrote:
> From: "Wachowski, Karol" <karol.wachowski@intel.com>
> 
> This param will be used to enable/disable HWS (hardware scheduler).
> The HWS is a FW side feature and may not be available on all
> HW generations and FW versions.
> 
> Signed-off-by: Wachowski, Karol <karol.wachowski@intel.com>
> Signed-off-by: Jacek Lawrynowicz <jacek.lawrynowicz@linux.intel.com>
> ---
>   drivers/accel/ivpu/ivpu_drv.c     | 4 ++++
>   drivers/accel/ivpu/ivpu_drv.h     | 1 +
>   drivers/accel/ivpu/ivpu_hw.h      | 3 ++-
>   drivers/accel/ivpu/ivpu_hw_37xx.c | 1 +
>   drivers/accel/ivpu/ivpu_hw_40xx.c | 3 ++-
>   5 files changed, 10 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/accel/ivpu/ivpu_drv.c b/drivers/accel/ivpu/ivpu_drv.c
> index 51d3f1a55d02..db47e7ef6322 100644
> --- a/drivers/accel/ivpu/ivpu_drv.c
> +++ b/drivers/accel/ivpu/ivpu_drv.c
> @@ -51,6 +51,10 @@ u8 ivpu_pll_max_ratio = U8_MAX;
>   module_param_named(pll_max_ratio, ivpu_pll_max_ratio, byte, 0644);
>   MODULE_PARM_DESC(pll_max_ratio, "Maximum PLL ratio used to set NPU frequency");
>   
> +bool ivpu_sched_mode;
> +module_param_named(sched_mode, ivpu_sched_mode, bool, 0644);
> +MODULE_PARM_DESC(sched_mode, "Scheduler mode: 0 - OS scheduler, 1 - HW scheduler");

"OS scheduler"
Host OS (aka Linux) or device side OS?  Seems a bit ambiguous.
Also looks like this must be set before the device is initialized, yet 
it does not look like that is communicated.

-Jeff
Jacek Lawrynowicz May 13, 2024, 10:08 a.m. UTC | #2
Hi,

On 10.05.2024 18:30, Jeffrey Hugo wrote:
> On 5/8/2024 7:20 AM, Jacek Lawrynowicz wrote:
>> From: "Wachowski, Karol" <karol.wachowski@intel.com>
>>
>> This param will be used to enable/disable HWS (hardware scheduler).
>> The HWS is a FW side feature and may not be available on all
>> HW generations and FW versions.
>>
>> Signed-off-by: Wachowski, Karol <karol.wachowski@intel.com>
>> Signed-off-by: Jacek Lawrynowicz <jacek.lawrynowicz@linux.intel.com>
>> ---
>>   drivers/accel/ivpu/ivpu_drv.c     | 4 ++++
>>   drivers/accel/ivpu/ivpu_drv.h     | 1 +
>>   drivers/accel/ivpu/ivpu_hw.h      | 3 ++-
>>   drivers/accel/ivpu/ivpu_hw_37xx.c | 1 +
>>   drivers/accel/ivpu/ivpu_hw_40xx.c | 3 ++-
>>   5 files changed, 10 insertions(+), 2 deletions(-)
>>
>> diff --git a/drivers/accel/ivpu/ivpu_drv.c b/drivers/accel/ivpu/ivpu_drv.c
>> index 51d3f1a55d02..db47e7ef6322 100644
>> --- a/drivers/accel/ivpu/ivpu_drv.c
>> +++ b/drivers/accel/ivpu/ivpu_drv.c
>> @@ -51,6 +51,10 @@ u8 ivpu_pll_max_ratio = U8_MAX;
>>   module_param_named(pll_max_ratio, ivpu_pll_max_ratio, byte, 0644);
>>   MODULE_PARM_DESC(pll_max_ratio, "Maximum PLL ratio used to set NPU frequency");
>>   +bool ivpu_sched_mode;
>> +module_param_named(sched_mode, ivpu_sched_mode, bool, 0644);
>> +MODULE_PARM_DESC(sched_mode, "Scheduler mode: 0 - OS scheduler, 1 - HW scheduler");
> 
> "OS scheduler"
> Host OS (aka Linux) or device side OS?  Seems a bit ambiguous.
Yeah, it should be "No scheduler". We actually don't have any OS scheduling for workloads.

> Also looks like this must be set before the device is initialized, yet it does not look like that is communicated.
I'm usually try to keep param descriptions short. I will change the mode to 0444, so it won't be possible to change the param after driver is loaded.
diff mbox series

Patch

diff --git a/drivers/accel/ivpu/ivpu_drv.c b/drivers/accel/ivpu/ivpu_drv.c
index 51d3f1a55d02..db47e7ef6322 100644
--- a/drivers/accel/ivpu/ivpu_drv.c
+++ b/drivers/accel/ivpu/ivpu_drv.c
@@ -51,6 +51,10 @@  u8 ivpu_pll_max_ratio = U8_MAX;
 module_param_named(pll_max_ratio, ivpu_pll_max_ratio, byte, 0644);
 MODULE_PARM_DESC(pll_max_ratio, "Maximum PLL ratio used to set NPU frequency");
 
+bool ivpu_sched_mode;
+module_param_named(sched_mode, ivpu_sched_mode, bool, 0644);
+MODULE_PARM_DESC(sched_mode, "Scheduler mode: 0 - OS scheduler, 1 - HW scheduler");
+
 bool ivpu_disable_mmu_cont_pages;
 module_param_named(disable_mmu_cont_pages, ivpu_disable_mmu_cont_pages, bool, 0644);
 MODULE_PARM_DESC(disable_mmu_cont_pages, "Disable MMU contiguous pages optimization");
diff --git a/drivers/accel/ivpu/ivpu_drv.h b/drivers/accel/ivpu/ivpu_drv.h
index bb4374d0eaec..a3993c93403a 100644
--- a/drivers/accel/ivpu/ivpu_drv.h
+++ b/drivers/accel/ivpu/ivpu_drv.h
@@ -158,6 +158,7 @@  struct ivpu_file_priv {
 extern int ivpu_dbg_mask;
 extern u8 ivpu_pll_min_ratio;
 extern u8 ivpu_pll_max_ratio;
+extern bool ivpu_sched_mode;
 extern bool ivpu_disable_mmu_cont_pages;
 
 #define IVPU_TEST_MODE_FW_TEST            BIT(0)
diff --git a/drivers/accel/ivpu/ivpu_hw.h b/drivers/accel/ivpu/ivpu_hw.h
index 094c659d2800..d247a2e99496 100644
--- a/drivers/accel/ivpu/ivpu_hw.h
+++ b/drivers/accel/ivpu/ivpu_hw.h
@@ -1,6 +1,6 @@ 
 /* SPDX-License-Identifier: GPL-2.0-only */
 /*
- * Copyright (C) 2020-2023 Intel Corporation
+ * Copyright (C) 2020-2024 Intel Corporation
  */
 
 #ifndef __IVPU_HW_H__
@@ -59,6 +59,7 @@  struct ivpu_hw_info {
 		u32 profiling_freq;
 	} pll;
 	u32 tile_fuse;
+	u32 sched_mode;
 	u32 sku;
 	u16 config;
 	int dma_bits;
diff --git a/drivers/accel/ivpu/ivpu_hw_37xx.c b/drivers/accel/ivpu/ivpu_hw_37xx.c
index bd25e2d9fb0f..ce664b6515aa 100644
--- a/drivers/accel/ivpu/ivpu_hw_37xx.c
+++ b/drivers/accel/ivpu/ivpu_hw_37xx.c
@@ -589,6 +589,7 @@  static int ivpu_hw_37xx_info_init(struct ivpu_device *vdev)
 	hw->tile_fuse = TILE_FUSE_ENABLE_BOTH;
 	hw->sku = TILE_SKU_BOTH;
 	hw->config = WP_CONFIG_2_TILE_4_3_RATIO;
+	hw->sched_mode = ivpu_sched_mode;
 
 	ivpu_pll_init_frequency_ratios(vdev);
 
diff --git a/drivers/accel/ivpu/ivpu_hw_40xx.c b/drivers/accel/ivpu/ivpu_hw_40xx.c
index b0b88d4c8926..186cd87079c2 100644
--- a/drivers/accel/ivpu/ivpu_hw_40xx.c
+++ b/drivers/accel/ivpu/ivpu_hw_40xx.c
@@ -1,6 +1,6 @@ 
 // SPDX-License-Identifier: GPL-2.0-only
 /*
- * Copyright (C) 2020-2023 Intel Corporation
+ * Copyright (C) 2020-2024 Intel Corporation
  */
 
 #include "ivpu_drv.h"
@@ -724,6 +724,7 @@  static int ivpu_hw_40xx_info_init(struct ivpu_device *vdev)
 	else
 		ivpu_dbg(vdev, MISC, "Fuse: All %d tiles enabled\n", TILE_MAX_NUM);
 
+	hw->sched_mode = ivpu_sched_mode;
 	hw->tile_fuse = tile_disable;
 	hw->pll.profiling_freq = PLL_PROFILING_FREQ_DEFAULT;