| Message ID | 20240509053155.327071-5-animesh.manna@intel.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | Link off between frames for edp | expand |
On Thu, 2024-05-09 at 11:01 +0530, Animesh Manna wrote: > Link Off Between Active Frames, is a new feature for eDP > that allows the panel to go to lower power state after > transmission of data. This is a feature on top of ALPM, AS SDP. > Add compute config during atomic-check phase. > > v1: RFC version. > v2: Add separate flag for auxless-alpm. [Jani] > v3: > - intel_dp->lobf_supported replaced with crtc_state->has_lobf. > [Jouni] > - Add DISPLAY_VER() check. [Jouni] > - Modify function name of get_aux_less_status. [Jani] > v4: Add enum alpm_mode to hold the aux-wake/less capability. > > Signed-off-by: Animesh Manna <animesh.manna@intel.com> > --- > drivers/gpu/drm/i915/display/intel_alpm.c | 58 > +++++++++++++++++++ > drivers/gpu/drm/i915/display/intel_alpm.h | 5 ++ > .../drm/i915/display/intel_display_types.h | 11 ++++ > drivers/gpu/drm/i915/display/intel_dp.c | 4 ++ > 4 files changed, 78 insertions(+) > > diff --git a/drivers/gpu/drm/i915/display/intel_alpm.c > b/drivers/gpu/drm/i915/display/intel_alpm.c > index ee6c2a959f09..5979eab1f2e0 100644 > --- a/drivers/gpu/drm/i915/display/intel_alpm.c > +++ b/drivers/gpu/drm/i915/display/intel_alpm.c > @@ -11,6 +11,23 @@ > #include "intel_dp_aux.h" > #include "intel_psr_regs.h" > > +enum alpm_mode intel_alpm_get_capability(struct intel_dp *intel_dp) > +{ > + u8 alpm_caps = 0; > + > + if (drm_dp_dpcd_readb(&intel_dp->aux, DP_RECEIVER_ALPM_CAP, > + &alpm_caps) != 1) > + return ALPM_INVALID; > + > + if (alpm_caps & DP_ALPM_CAP) > + return ALPM_AUX_WAKE; > + > + if (alpm_caps & DP_ALPM_AUX_LESS_CAP) > + return ALPM_AUX_LESS; > + > + return ALPM_NOT_SUPPORTED; > +} This will always return ALPM_AUX_WAKE if both are supported. I don't think this is what you want? You could add alpm_dpcd into intel_dp. Then for this purpose add aux_wake_supported() and aux_less_wake_supported()? BR, Jouni Högander > + > /* > * See Bspec: 71632 for the table > * > @@ -242,6 +259,47 @@ bool intel_alpm_compute_params(struct intel_dp > *intel_dp, > return true; > } > > +void intel_alpm_compute_lobf_config(struct intel_dp *intel_dp, > + struct intel_crtc_state > *crtc_state, > + struct drm_connector_state > *conn_state) > +{ > + struct drm_i915_private *i915 = dp_to_i915(intel_dp); > + struct drm_display_mode *adjusted_mode = &crtc_state- > >hw.adjusted_mode; > + int waketime_in_lines, first_sdp_position; > + int context_latency, guardband; > + > + if (!intel_dp_is_edp(intel_dp)) > + return; > + > + if (DISPLAY_VER(i915) < 20) > + return; > + > + if (!intel_dp_as_sdp_supported(intel_dp)) > + return; > + > + if (crtc_state->has_psr) > + return; > + > + if (intel_dp->alpm_parameters.mode == ALPM_INVALID || > + intel_dp->alpm_parameters.mode == ALPM_NOT_SUPPORTED) > + return; > + > + if (!intel_alpm_compute_params(intel_dp, crtc_state)) > + return; > + > + context_latency = adjusted_mode->crtc_vblank_start - > adjusted_mode->crtc_vdisplay; > + guardband = adjusted_mode->crtc_vtotal - > + adjusted_mode->crtc_vdisplay - context_latency; > + first_sdp_position = adjusted_mode->crtc_vtotal - > adjusted_mode->crtc_vsync_start; > + if (intel_dp->alpm_parameters.mode == ALPM_AUX_LESS) > + waketime_in_lines = intel_dp- > >alpm_parameters.io_wake_lines; > + else > + waketime_in_lines = intel_dp- > >alpm_parameters.fast_wake_lines; > + > + crtc_state->has_lobf = (context_latency + guardband) > > + (first_sdp_position + waketime_in_lines); > +} > + > static void lnl_alpm_configure(struct intel_dp *intel_dp) > { > struct drm_i915_private *dev_priv = dp_to_i915(intel_dp); > diff --git a/drivers/gpu/drm/i915/display/intel_alpm.h > b/drivers/gpu/drm/i915/display/intel_alpm.h > index c45d078e5a6b..80c8a66b34af 100644 > --- a/drivers/gpu/drm/i915/display/intel_alpm.h > +++ b/drivers/gpu/drm/i915/display/intel_alpm.h > @@ -10,9 +10,14 @@ > > struct intel_dp; > struct intel_crtc_state; > +struct drm_connector_state; > > +enum alpm_mode intel_alpm_get_capability(struct intel_dp *intel_dp); > bool intel_alpm_compute_params(struct intel_dp *intel_dp, > struct intel_crtc_state *crtc_state); > +void intel_alpm_compute_lobf_config(struct intel_dp *intel_dp, > + struct intel_crtc_state > *crtc_state, > + struct drm_connector_state > *conn_state); > void intel_alpm_configure(struct intel_dp *intel_dp); > > #endif > diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h > b/drivers/gpu/drm/i915/display/intel_display_types.h > index e81fd71ce57b..79e9e543020b 100644 > --- a/drivers/gpu/drm/i915/display/intel_display_types.h > +++ b/drivers/gpu/drm/i915/display/intel_display_types.h > @@ -1405,6 +1405,9 @@ struct intel_crtc_state { > > /* for loading single buffered registers during vblank */ > struct drm_vblank_work vblank_work; > + > + /* LOBF flag */ > + bool has_lobf; > }; > > enum intel_pipe_crc_source { > @@ -1715,6 +1718,13 @@ struct intel_psr { > u8 entry_setup_frames; > }; > > +enum alpm_mode { > + ALPM_INVALID, > + ALPM_AUX_WAKE, > + ALPM_AUX_LESS, > + ALPM_NOT_SUPPORTED > +}; > + > struct intel_dp { > i915_reg_t output_reg; > u32 DP; > @@ -1835,6 +1845,7 @@ struct intel_dp { > u8 fast_wake_lines; > > /* LNL and beyond */ > + enum alpm_mode mode; > u8 check_entry_lines; > u8 silence_period_sym_clocks; > u8 lfps_half_cycle_num_of_syms; > diff --git a/drivers/gpu/drm/i915/display/intel_dp.c > b/drivers/gpu/drm/i915/display/intel_dp.c > index 486361eb0070..df423a33f6fc 100644 > --- a/drivers/gpu/drm/i915/display/intel_dp.c > +++ b/drivers/gpu/drm/i915/display/intel_dp.c > @@ -48,6 +48,7 @@ > #include "i915_drv.h" > #include "i915_irq.h" > #include "i915_reg.h" > +#include "intel_alpm.h" > #include "intel_atomic.h" > #include "intel_audio.h" > #include "intel_backlight.h" > @@ -3000,6 +3001,7 @@ intel_dp_compute_config(struct intel_encoder > *encoder, > intel_vrr_compute_config(pipe_config, conn_state); > intel_dp_compute_as_sdp(intel_dp, pipe_config); > intel_psr_compute_config(intel_dp, pipe_config, conn_state); > + intel_alpm_compute_lobf_config(intel_dp, pipe_config, > conn_state); > intel_dp_drrs_compute_config(connector, pipe_config, > link_bpp_x16); > intel_dp_compute_vsc_sdp(intel_dp, pipe_config, conn_state); > intel_dp_compute_hdr_metadata_infoframe_sdp(intel_dp, > pipe_config, conn_state); > @@ -6615,6 +6617,8 @@ static bool intel_edp_init_connector(struct > intel_dp *intel_dp, > > intel_pps_init_late(intel_dp); > > + intel_dp->alpm_parameters.mode = > intel_alpm_get_capability(intel_dp); > + > return true; > > out_vdd_off:
> -----Original Message----- > From: Hogander, Jouni <jouni.hogander@intel.com> > Sent: Monday, May 13, 2024 1:02 PM > To: Manna, Animesh <animesh.manna@intel.com>; intel- > gfx@lists.freedesktop.org > Cc: dri-devel@lists.freedesktop.org; Murthy, Arun R > <arun.r.murthy@intel.com>; Nikula, Jani <jani.nikula@intel.com> > Subject: Re: [PATCH v4 4/6] drm/i915/alpm: Add compute config for lobf > > On Thu, 2024-05-09 at 11:01 +0530, Animesh Manna wrote: > > Link Off Between Active Frames, is a new feature for eDP that allows > > the panel to go to lower power state after transmission of data. This > > is a feature on top of ALPM, AS SDP. > > Add compute config during atomic-check phase. > > > > v1: RFC version. > > v2: Add separate flag for auxless-alpm. [Jani] > > v3: > > - intel_dp->lobf_supported replaced with crtc_state->has_lobf. > > [Jouni] > > - Add DISPLAY_VER() check. [Jouni] > > - Modify function name of get_aux_less_status. [Jani] > > v4: Add enum alpm_mode to hold the aux-wake/less capability. > > > > Signed-off-by: Animesh Manna <animesh.manna@intel.com> > > --- > > drivers/gpu/drm/i915/display/intel_alpm.c | 58 > > +++++++++++++++++++ > > drivers/gpu/drm/i915/display/intel_alpm.h | 5 ++ > > .../drm/i915/display/intel_display_types.h | 11 ++++ > > drivers/gpu/drm/i915/display/intel_dp.c | 4 ++ > > 4 files changed, 78 insertions(+) > > > > diff --git a/drivers/gpu/drm/i915/display/intel_alpm.c > > b/drivers/gpu/drm/i915/display/intel_alpm.c > > index ee6c2a959f09..5979eab1f2e0 100644 > > --- a/drivers/gpu/drm/i915/display/intel_alpm.c > > +++ b/drivers/gpu/drm/i915/display/intel_alpm.c > > @@ -11,6 +11,23 @@ > > #include "intel_dp_aux.h" > > #include "intel_psr_regs.h" > > > > +enum alpm_mode intel_alpm_get_capability(struct intel_dp *intel_dp) { > > + u8 alpm_caps = 0; > > + > > + if (drm_dp_dpcd_readb(&intel_dp->aux, DP_RECEIVER_ALPM_CAP, > > + &alpm_caps) != 1) > > + return ALPM_INVALID; > > + > > + if (alpm_caps & DP_ALPM_CAP) > > + return ALPM_AUX_WAKE; > > + > > + if (alpm_caps & DP_ALPM_AUX_LESS_CAP) > > + return ALPM_AUX_LESS; > > + > > + return ALPM_NOT_SUPPORTED; > > +} > > This will always return ALPM_AUX_WAKE if both are supported. I don't think > this is what you want? > > You could add alpm_dpcd into intel_dp. Then for this purpose add > aux_wake_supported() and aux_less_wake_supported()? Ok, will add in next version. Regards, Animesh > > BR, > > Jouni Högander > > > + > > /* > > * See Bspec: 71632 for the table > > * > > @@ -242,6 +259,47 @@ bool intel_alpm_compute_params(struct intel_dp > > *intel_dp, > > return true; > > } > > > > +void intel_alpm_compute_lobf_config(struct intel_dp *intel_dp, > > + struct intel_crtc_state > > *crtc_state, > > + struct drm_connector_state > > *conn_state) > > +{ > > + struct drm_i915_private *i915 = dp_to_i915(intel_dp); > > + struct drm_display_mode *adjusted_mode = &crtc_state- > > >hw.adjusted_mode; > > + int waketime_in_lines, first_sdp_position; > > + int context_latency, guardband; > > + > > + if (!intel_dp_is_edp(intel_dp)) > > + return; > > + > > + if (DISPLAY_VER(i915) < 20) > > + return; > > + > > + if (!intel_dp_as_sdp_supported(intel_dp)) > > + return; > > + > > + if (crtc_state->has_psr) > > + return; > > + > > + if (intel_dp->alpm_parameters.mode == ALPM_INVALID || > > + intel_dp->alpm_parameters.mode == ALPM_NOT_SUPPORTED) > > + return; > > + > > + if (!intel_alpm_compute_params(intel_dp, crtc_state)) > > + return; > > + > > + context_latency = adjusted_mode->crtc_vblank_start - > > adjusted_mode->crtc_vdisplay; > > + guardband = adjusted_mode->crtc_vtotal - > > + adjusted_mode->crtc_vdisplay - context_latency; > > + first_sdp_position = adjusted_mode->crtc_vtotal - > > adjusted_mode->crtc_vsync_start; > > + if (intel_dp->alpm_parameters.mode == ALPM_AUX_LESS) > > + waketime_in_lines = intel_dp- > > >alpm_parameters.io_wake_lines; > > + else > > + waketime_in_lines = intel_dp- > > >alpm_parameters.fast_wake_lines; > > + > > + crtc_state->has_lobf = (context_latency + guardband) > > > + (first_sdp_position + waketime_in_lines); } > > + > > static void lnl_alpm_configure(struct intel_dp *intel_dp) > > { > > struct drm_i915_private *dev_priv = dp_to_i915(intel_dp); diff > > --git a/drivers/gpu/drm/i915/display/intel_alpm.h > > b/drivers/gpu/drm/i915/display/intel_alpm.h > > index c45d078e5a6b..80c8a66b34af 100644 > > --- a/drivers/gpu/drm/i915/display/intel_alpm.h > > +++ b/drivers/gpu/drm/i915/display/intel_alpm.h > > @@ -10,9 +10,14 @@ > > > > struct intel_dp; > > struct intel_crtc_state; > > +struct drm_connector_state; > > > > +enum alpm_mode intel_alpm_get_capability(struct intel_dp *intel_dp); > > bool intel_alpm_compute_params(struct intel_dp *intel_dp, > > struct intel_crtc_state *crtc_state); > > +void intel_alpm_compute_lobf_config(struct intel_dp *intel_dp, > > + struct intel_crtc_state > > *crtc_state, > > + struct drm_connector_state > > *conn_state); > > void intel_alpm_configure(struct intel_dp *intel_dp); > > > > #endif > > diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h > > b/drivers/gpu/drm/i915/display/intel_display_types.h > > index e81fd71ce57b..79e9e543020b 100644 > > --- a/drivers/gpu/drm/i915/display/intel_display_types.h > > +++ b/drivers/gpu/drm/i915/display/intel_display_types.h > > @@ -1405,6 +1405,9 @@ struct intel_crtc_state { > > > > /* for loading single buffered registers during vblank */ > > struct drm_vblank_work vblank_work; > > + > > + /* LOBF flag */ > > + bool has_lobf; > > }; > > > > enum intel_pipe_crc_source { > > @@ -1715,6 +1718,13 @@ struct intel_psr { > > u8 entry_setup_frames; > > }; > > > > +enum alpm_mode { > > + ALPM_INVALID, > > + ALPM_AUX_WAKE, > > + ALPM_AUX_LESS, > > + ALPM_NOT_SUPPORTED > > +}; > > + > > struct intel_dp { > > i915_reg_t output_reg; > > u32 DP; > > @@ -1835,6 +1845,7 @@ struct intel_dp { > > u8 fast_wake_lines; > > > > /* LNL and beyond */ > > + enum alpm_mode mode; > > u8 check_entry_lines; > > u8 silence_period_sym_clocks; > > u8 lfps_half_cycle_num_of_syms; diff --git > > a/drivers/gpu/drm/i915/display/intel_dp.c > > b/drivers/gpu/drm/i915/display/intel_dp.c > > index 486361eb0070..df423a33f6fc 100644 > > --- a/drivers/gpu/drm/i915/display/intel_dp.c > > +++ b/drivers/gpu/drm/i915/display/intel_dp.c > > @@ -48,6 +48,7 @@ > > #include "i915_drv.h" > > #include "i915_irq.h" > > #include "i915_reg.h" > > +#include "intel_alpm.h" > > #include "intel_atomic.h" > > #include "intel_audio.h" > > #include "intel_backlight.h" > > @@ -3000,6 +3001,7 @@ intel_dp_compute_config(struct intel_encoder > > *encoder, > > intel_vrr_compute_config(pipe_config, conn_state); > > intel_dp_compute_as_sdp(intel_dp, pipe_config); > > intel_psr_compute_config(intel_dp, pipe_config, conn_state); > > + intel_alpm_compute_lobf_config(intel_dp, pipe_config, > > conn_state); > > intel_dp_drrs_compute_config(connector, pipe_config, > > link_bpp_x16); > > intel_dp_compute_vsc_sdp(intel_dp, pipe_config, conn_state); > > intel_dp_compute_hdr_metadata_infoframe_sdp(intel_dp, > > pipe_config, conn_state); > > @@ -6615,6 +6617,8 @@ static bool intel_edp_init_connector(struct > > intel_dp *intel_dp, > > > > intel_pps_init_late(intel_dp); > > > > + intel_dp->alpm_parameters.mode = > > intel_alpm_get_capability(intel_dp); > > + > > return true; > > > > out_vdd_off:
diff --git a/drivers/gpu/drm/i915/display/intel_alpm.c b/drivers/gpu/drm/i915/display/intel_alpm.c index ee6c2a959f09..5979eab1f2e0 100644 --- a/drivers/gpu/drm/i915/display/intel_alpm.c +++ b/drivers/gpu/drm/i915/display/intel_alpm.c @@ -11,6 +11,23 @@ #include "intel_dp_aux.h" #include "intel_psr_regs.h" +enum alpm_mode intel_alpm_get_capability(struct intel_dp *intel_dp) +{ + u8 alpm_caps = 0; + + if (drm_dp_dpcd_readb(&intel_dp->aux, DP_RECEIVER_ALPM_CAP, + &alpm_caps) != 1) + return ALPM_INVALID; + + if (alpm_caps & DP_ALPM_CAP) + return ALPM_AUX_WAKE; + + if (alpm_caps & DP_ALPM_AUX_LESS_CAP) + return ALPM_AUX_LESS; + + return ALPM_NOT_SUPPORTED; +} + /* * See Bspec: 71632 for the table * @@ -242,6 +259,47 @@ bool intel_alpm_compute_params(struct intel_dp *intel_dp, return true; } +void intel_alpm_compute_lobf_config(struct intel_dp *intel_dp, + struct intel_crtc_state *crtc_state, + struct drm_connector_state *conn_state) +{ + struct drm_i915_private *i915 = dp_to_i915(intel_dp); + struct drm_display_mode *adjusted_mode = &crtc_state->hw.adjusted_mode; + int waketime_in_lines, first_sdp_position; + int context_latency, guardband; + + if (!intel_dp_is_edp(intel_dp)) + return; + + if (DISPLAY_VER(i915) < 20) + return; + + if (!intel_dp_as_sdp_supported(intel_dp)) + return; + + if (crtc_state->has_psr) + return; + + if (intel_dp->alpm_parameters.mode == ALPM_INVALID || + intel_dp->alpm_parameters.mode == ALPM_NOT_SUPPORTED) + return; + + if (!intel_alpm_compute_params(intel_dp, crtc_state)) + return; + + context_latency = adjusted_mode->crtc_vblank_start - adjusted_mode->crtc_vdisplay; + guardband = adjusted_mode->crtc_vtotal - + adjusted_mode->crtc_vdisplay - context_latency; + first_sdp_position = adjusted_mode->crtc_vtotal - adjusted_mode->crtc_vsync_start; + if (intel_dp->alpm_parameters.mode == ALPM_AUX_LESS) + waketime_in_lines = intel_dp->alpm_parameters.io_wake_lines; + else + waketime_in_lines = intel_dp->alpm_parameters.fast_wake_lines; + + crtc_state->has_lobf = (context_latency + guardband) > + (first_sdp_position + waketime_in_lines); +} + static void lnl_alpm_configure(struct intel_dp *intel_dp) { struct drm_i915_private *dev_priv = dp_to_i915(intel_dp); diff --git a/drivers/gpu/drm/i915/display/intel_alpm.h b/drivers/gpu/drm/i915/display/intel_alpm.h index c45d078e5a6b..80c8a66b34af 100644 --- a/drivers/gpu/drm/i915/display/intel_alpm.h +++ b/drivers/gpu/drm/i915/display/intel_alpm.h @@ -10,9 +10,14 @@ struct intel_dp; struct intel_crtc_state; +struct drm_connector_state; +enum alpm_mode intel_alpm_get_capability(struct intel_dp *intel_dp); bool intel_alpm_compute_params(struct intel_dp *intel_dp, struct intel_crtc_state *crtc_state); +void intel_alpm_compute_lobf_config(struct intel_dp *intel_dp, + struct intel_crtc_state *crtc_state, + struct drm_connector_state *conn_state); void intel_alpm_configure(struct intel_dp *intel_dp); #endif diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h b/drivers/gpu/drm/i915/display/intel_display_types.h index e81fd71ce57b..79e9e543020b 100644 --- a/drivers/gpu/drm/i915/display/intel_display_types.h +++ b/drivers/gpu/drm/i915/display/intel_display_types.h @@ -1405,6 +1405,9 @@ struct intel_crtc_state { /* for loading single buffered registers during vblank */ struct drm_vblank_work vblank_work; + + /* LOBF flag */ + bool has_lobf; }; enum intel_pipe_crc_source { @@ -1715,6 +1718,13 @@ struct intel_psr { u8 entry_setup_frames; }; +enum alpm_mode { + ALPM_INVALID, + ALPM_AUX_WAKE, + ALPM_AUX_LESS, + ALPM_NOT_SUPPORTED +}; + struct intel_dp { i915_reg_t output_reg; u32 DP; @@ -1835,6 +1845,7 @@ struct intel_dp { u8 fast_wake_lines; /* LNL and beyond */ + enum alpm_mode mode; u8 check_entry_lines; u8 silence_period_sym_clocks; u8 lfps_half_cycle_num_of_syms; diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c index 486361eb0070..df423a33f6fc 100644 --- a/drivers/gpu/drm/i915/display/intel_dp.c +++ b/drivers/gpu/drm/i915/display/intel_dp.c @@ -48,6 +48,7 @@ #include "i915_drv.h" #include "i915_irq.h" #include "i915_reg.h" +#include "intel_alpm.h" #include "intel_atomic.h" #include "intel_audio.h" #include "intel_backlight.h" @@ -3000,6 +3001,7 @@ intel_dp_compute_config(struct intel_encoder *encoder, intel_vrr_compute_config(pipe_config, conn_state); intel_dp_compute_as_sdp(intel_dp, pipe_config); intel_psr_compute_config(intel_dp, pipe_config, conn_state); + intel_alpm_compute_lobf_config(intel_dp, pipe_config, conn_state); intel_dp_drrs_compute_config(connector, pipe_config, link_bpp_x16); intel_dp_compute_vsc_sdp(intel_dp, pipe_config, conn_state); intel_dp_compute_hdr_metadata_infoframe_sdp(intel_dp, pipe_config, conn_state); @@ -6615,6 +6617,8 @@ static bool intel_edp_init_connector(struct intel_dp *intel_dp, intel_pps_init_late(intel_dp); + intel_dp->alpm_parameters.mode = intel_alpm_get_capability(intel_dp); + return true; out_vdd_off:
Link Off Between Active Frames, is a new feature for eDP that allows the panel to go to lower power state after transmission of data. This is a feature on top of ALPM, AS SDP. Add compute config during atomic-check phase. v1: RFC version. v2: Add separate flag for auxless-alpm. [Jani] v3: - intel_dp->lobf_supported replaced with crtc_state->has_lobf. [Jouni] - Add DISPLAY_VER() check. [Jouni] - Modify function name of get_aux_less_status. [Jani] v4: Add enum alpm_mode to hold the aux-wake/less capability. Signed-off-by: Animesh Manna <animesh.manna@intel.com> --- drivers/gpu/drm/i915/display/intel_alpm.c | 58 +++++++++++++++++++ drivers/gpu/drm/i915/display/intel_alpm.h | 5 ++ .../drm/i915/display/intel_display_types.h | 11 ++++ drivers/gpu/drm/i915/display/intel_dp.c | 4 ++ 4 files changed, 78 insertions(+)