| Message ID | 20240412084213.1733764-8-steven.price@arm.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | arm64: Support for running as a guest in Arm CCA | expand |
On Fri, Apr 12, 2024 at 09:42:06AM +0100, Steven Price wrote: > diff --git a/arch/arm64/include/asm/kvm_arm.h b/arch/arm64/include/asm/kvm_arm.h > index e01bb5ca13b7..9944aca348bd 100644 > --- a/arch/arm64/include/asm/kvm_arm.h > +++ b/arch/arm64/include/asm/kvm_arm.h > @@ -398,7 +398,7 @@ > * bits in PAR are res0. > */ > #define PAR_TO_HPFAR(par) \ > - (((par) & GENMASK_ULL(52 - 1, 12)) >> 8) > + (((par) & GENMASK_ULL(MAX_PHYS_MASK_SHIFT - 1, 12)) >> 8) Why does this need to be changed? It's still a constant not dependent on the new dynamic IPA size. > diff --git a/arch/arm64/include/asm/pgtable-hwdef.h b/arch/arm64/include/asm/pgtable-hwdef.h > index ef207a0d4f0d..90dc292bed5f 100644 > --- a/arch/arm64/include/asm/pgtable-hwdef.h > +++ b/arch/arm64/include/asm/pgtable-hwdef.h > @@ -206,8 +206,8 @@ > /* > * Highest possible physical address supported. > */ > -#define PHYS_MASK_SHIFT (CONFIG_ARM64_PA_BITS) > -#define PHYS_MASK ((UL(1) << PHYS_MASK_SHIFT) - 1) > +#define MAX_PHYS_MASK_SHIFT (CONFIG_ARM64_PA_BITS) > +#define MAX_PHYS_MASK ((UL(1) << PHYS_MASK_SHIFT) - 1) I prefer to have MAX as suffix in those definitions, it matches other places like TASK_SIZE_MAX, PHYS_ADDR_MAX (I know PHYS_MASK_MAX doesn't roll off the tongue easily but very few people tend to read the kernel aloud ;)).
On 13/05/2024 17:38, Catalin Marinas wrote: > On Fri, Apr 12, 2024 at 09:42:06AM +0100, Steven Price wrote: >> diff --git a/arch/arm64/include/asm/kvm_arm.h b/arch/arm64/include/asm/kvm_arm.h >> index e01bb5ca13b7..9944aca348bd 100644 >> --- a/arch/arm64/include/asm/kvm_arm.h >> +++ b/arch/arm64/include/asm/kvm_arm.h >> @@ -398,7 +398,7 @@ >> * bits in PAR are res0. >> */ >> #define PAR_TO_HPFAR(par) \ >> - (((par) & GENMASK_ULL(52 - 1, 12)) >> 8) >> + (((par) & GENMASK_ULL(MAX_PHYS_MASK_SHIFT - 1, 12)) >> 8) > > Why does this need to be changed? It's still a constant not dependent on > the new dynamic IPA size. Good question - this appears to be a rebase error. Since commit a0d37784bfd7 ("KVM: arm64: Fix PAR_TO_HPFAR() to work independently of PA_BITS.") this macro no longer uses PHYS_MASK_SHIFT. Previously the change was to just to keep this uses the new 'MAX' constant. >> diff --git a/arch/arm64/include/asm/pgtable-hwdef.h b/arch/arm64/include/asm/pgtable-hwdef.h >> index ef207a0d4f0d..90dc292bed5f 100644 >> --- a/arch/arm64/include/asm/pgtable-hwdef.h >> +++ b/arch/arm64/include/asm/pgtable-hwdef.h >> @@ -206,8 +206,8 @@ >> /* >> * Highest possible physical address supported. >> */ >> -#define PHYS_MASK_SHIFT (CONFIG_ARM64_PA_BITS) >> -#define PHYS_MASK ((UL(1) << PHYS_MASK_SHIFT) - 1) >> +#define MAX_PHYS_MASK_SHIFT (CONFIG_ARM64_PA_BITS) >> +#define MAX_PHYS_MASK ((UL(1) << PHYS_MASK_SHIFT) - 1) > > I prefer to have MAX as suffix in those definitions, it matches other > places like TASK_SIZE_MAX, PHYS_ADDR_MAX (I know PHYS_MASK_MAX doesn't > roll off the tongue easily but very few people tend to read the kernel > aloud ;)). I could rename, but actually given the above rebasing errors it appears these are actually no longer needed, so I'll just drop the MAX_xxx definitions. Thanks, Steve
diff --git a/arch/arm64/include/asm/kvm_arm.h b/arch/arm64/include/asm/kvm_arm.h index e01bb5ca13b7..9944aca348bd 100644 --- a/arch/arm64/include/asm/kvm_arm.h +++ b/arch/arm64/include/asm/kvm_arm.h @@ -398,7 +398,7 @@ * bits in PAR are res0. */ #define PAR_TO_HPFAR(par) \ - (((par) & GENMASK_ULL(52 - 1, 12)) >> 8) + (((par) & GENMASK_ULL(MAX_PHYS_MASK_SHIFT - 1, 12)) >> 8) #define ECN(x) { ESR_ELx_EC_##x, #x } diff --git a/arch/arm64/include/asm/pgtable-hwdef.h b/arch/arm64/include/asm/pgtable-hwdef.h index ef207a0d4f0d..90dc292bed5f 100644 --- a/arch/arm64/include/asm/pgtable-hwdef.h +++ b/arch/arm64/include/asm/pgtable-hwdef.h @@ -206,8 +206,8 @@ /* * Highest possible physical address supported. */ -#define PHYS_MASK_SHIFT (CONFIG_ARM64_PA_BITS) -#define PHYS_MASK ((UL(1) << PHYS_MASK_SHIFT) - 1) +#define MAX_PHYS_MASK_SHIFT (CONFIG_ARM64_PA_BITS) +#define MAX_PHYS_MASK ((UL(1) << PHYS_MASK_SHIFT) - 1) #define TTBR_CNP_BIT (UL(1) << 0) diff --git a/arch/arm64/include/asm/pgtable.h b/arch/arm64/include/asm/pgtable.h index afdd56d26ad7..f5376bd567a1 100644 --- a/arch/arm64/include/asm/pgtable.h +++ b/arch/arm64/include/asm/pgtable.h @@ -39,6 +39,11 @@ #include <linux/sched.h> #include <linux/page_table_check.h> +extern unsigned int phys_mask_shift; + +#define PHYS_MASK_SHIFT (phys_mask_shift) +#define PHYS_MASK ((1UL << PHYS_MASK_SHIFT) - 1) + #ifdef CONFIG_TRANSPARENT_HUGEPAGE #define __HAVE_ARCH_FLUSH_PMD_TLB_RANGE diff --git a/arch/arm64/kernel/rsi.c b/arch/arm64/kernel/rsi.c index b93252ed6fc5..159bc428c77b 100644 --- a/arch/arm64/kernel/rsi.c +++ b/arch/arm64/kernel/rsi.c @@ -12,6 +12,8 @@ struct realm_config __attribute((aligned(PAGE_SIZE))) config; unsigned long prot_ns_shared; EXPORT_SYMBOL(prot_ns_shared); +unsigned int phys_mask_shift = CONFIG_ARM64_PA_BITS; + DEFINE_STATIC_KEY_FALSE_RO(rsi_present); EXPORT_SYMBOL(rsi_present); @@ -62,5 +64,8 @@ void __init arm64_rsi_init(void) return; prot_ns_shared = BIT(config.ipa_bits - 1); + if (config.ipa_bits - 1 < phys_mask_shift) + phys_mask_shift = config.ipa_bits - 1; + static_branch_enable(&rsi_present); }
Make the PHYS_MASK_SHIFT dynamic for Realms. This is only is required for masking the PFN from a pte entry. Elsewhere, we could still use the PA bits configured by the kernel. So, this patch: -> renames PHYS_MASK_SHIFT -> MAX_PHYS_SHIFT as supported by the kernel -> Makes PHYS_MASK_SHIFT -> Dynamic value of the (I)PA bit width -> For a realm: reduces phys_mask_shift if the RMM reports a smaller configured size for the guest. Co-developed-by: Suzuki K Poulose <suzuki.poulose@arm.com> Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com> Signed-off-by: Steven Price <steven.price@arm.com> --- arch/arm64/include/asm/kvm_arm.h | 2 +- arch/arm64/include/asm/pgtable-hwdef.h | 4 ++-- arch/arm64/include/asm/pgtable.h | 5 +++++ arch/arm64/kernel/rsi.c | 5 +++++ 4 files changed, 13 insertions(+), 3 deletions(-)