diff mbox series

drm/etnaviv: don't disable TS on MMUv2 core when moving the linear window

Message ID 20240515121358.2027178-1-l.stach@pengutronix.de (mailing list archive)
State New, archived
Headers show
Series drm/etnaviv: don't disable TS on MMUv2 core when moving the linear window | expand

Commit Message

Lucas Stach May 15, 2024, 12:13 p.m. UTC
On MMUv2 cores the linear window is only relevant when starting the FE,
before the MMU has been activated. Once the MMU is active, all accesses
are translated with no way to bypass the MMU via the linear window. Thus
TS ignoring the linear window offset is not an issue on cores with MMUv2
present and there is no need to disable TS when we need to move the
linear window.

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
---
 drivers/gpu/drm/etnaviv/etnaviv_gpu.c | 7 +++++--
 1 file changed, 5 insertions(+), 2 deletions(-)

Comments

João Paulo Gonçalves May 15, 2024, 2:56 p.m. UTC | #1
Hi Lucas,

On Wed, May 15, 2024 at 02:13:58PM +0200, Lucas Stach wrote:
> On MMUv2 cores the linear window is only relevant when starting the FE,
> before the MMU has been activated. Once the MMU is active, all accesses
> are translated with no way to bypass the MMU via the linear window. Thus
> TS ignoring the linear window offset is not an issue on cores with MMUv2
> present and there is no need to disable TS when we need to move the
> linear window.
> 
> Signed-off-by: Lucas Stach <l.stach@pengutronix.de>

Tested-by: Joao Paulo Goncalves <joao.goncalves@toradex.com>

Thanks for the patch!

What do you think in backporting the patch to stable and adding a "Fixes:" tag?

Regards,
João Paulo
diff mbox series

Patch

diff --git a/drivers/gpu/drm/etnaviv/etnaviv_gpu.c b/drivers/gpu/drm/etnaviv/etnaviv_gpu.c
index 2db0fb071a57..50a6dc005bf8 100644
--- a/drivers/gpu/drm/etnaviv/etnaviv_gpu.c
+++ b/drivers/gpu/drm/etnaviv/etnaviv_gpu.c
@@ -875,12 +875,15 @@  int etnaviv_gpu_init(struct etnaviv_gpu *gpu)
 	 *
 	 * On MC1.0 cores the linear window offset is ignored by the TS engine,
 	 * leading to inconsistent memory views. Avoid using the offset on those
-	 * cores if possible, otherwise disable the TS feature.
+	 * cores if possible, otherwise disable the TS feature. MMUv2 doesn't
+	 * expose this issue, as all TS accesses are MMU translated, so the
+	 * linear window offset won't be used.
 	 */
 	cmdbuf_paddr = ALIGN_DOWN(etnaviv_cmdbuf_get_pa(&gpu->buffer), SZ_128M);
 
 	if (!(gpu->identity.features & chipFeatures_PIPE_3D) ||
-	    (gpu->identity.minor_features0 & chipMinorFeatures0_MC20)) {
+	    (gpu->identity.minor_features0 & chipMinorFeatures0_MC20) ||
+	    (gpu->identity.minor_features1 & chipMinorFeatures1_MMU_VERSION)) {
 		if (cmdbuf_paddr >= SZ_2G)
 			priv->mmu_global->memory_base = SZ_2G;
 		else