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[bpf-next] bpf, docs: Fix instruction.rst indentation

Message ID 20240526061815.22497-1-dthaler1968@gmail.com (mailing list archive)
State Accepted
Commit e245ef8a0b06fa5a18ca3bdcf82430166419283e
Delegated to: BPF
Headers show
Series [bpf-next] bpf, docs: Fix instruction.rst indentation | expand

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Commit Message

Dave Thaler May 26, 2024, 6:18 a.m. UTC 
The table captions patch corrected indented most tables to work with
the table directive for adding a caption but missed two of them.

Signed-off-by: Dave Thaler <dthaler1968@gmail.com>
---
 .../bpf/standardization/instruction-set.rst   | 26 +++++++++----------
 1 file changed, 13 insertions(+), 13 deletions(-)

Comments

Christoph Hellwig May 26, 2024, 9:04 a.m. UTC | #1 
Looks good:

Reviewed-by: Christoph Hellwig <hch@lst.de>
patchwork-bot+netdevbpf@kernel.org May 26, 2024, 5 p.m. UTC | #2 
Hello:

This patch was applied to bpf/bpf-next.git (master)
by Alexei Starovoitov <ast@kernel.org>:

On Sat, 25 May 2024 23:18:15 -0700 you wrote:
> The table captions patch corrected indented most tables to work with
> the table directive for adding a caption but missed two of them.
> 
> Signed-off-by: Dave Thaler <dthaler1968@gmail.com>
> ---
>  .../bpf/standardization/instruction-set.rst   | 26 +++++++++----------
>  1 file changed, 13 insertions(+), 13 deletions(-)

Here is the summary with links:
  - [bpf-next] bpf, docs: Fix instruction.rst indentation
    https://git.kernel.org/bpf/bpf-next/c/e245ef8a0b06

You are awesome, thank you!
diff mbox series

Patch

diff --git a/Documentation/bpf/standardization/instruction-set.rst b/Documentation/bpf/standardization/instruction-set.rst
index 08f614b10..8d1981050 100644
--- a/Documentation/bpf/standardization/instruction-set.rst
+++ b/Documentation/bpf/standardization/instruction-set.rst
@@ -296,12 +296,12 @@  For arithmetic and jump instructions (``ALU``, ``ALU64``, ``JMP`` and
 
   .. table:: Source operand location
 
-  ======  =====  ==============================================
-  source  value  description
-  ======  =====  ==============================================
-  K       0      use 32-bit 'imm' value as source operand
-  X       1      use 'src_reg' register value as source operand
-  ======  =====  ==============================================
+    ======  =====  ==============================================
+    source  value  description
+    ======  =====  ==============================================
+    K       0      use 32-bit 'imm' value as source operand
+    X       1      use 'src_reg' register value as source operand
+    ======  =====  ==============================================
 
 **instruction class**
   the instruction class (see `Instruction classes`_)
@@ -681,13 +681,13 @@  two complex atomic operations:
 
 .. table:: Complex atomic operations
 
-===========  ================  ===========================
-imm          value             description
-===========  ================  ===========================
-FETCH        0x01              modifier: return old value
-XCHG         0xe0 | FETCH      atomic exchange
-CMPXCHG      0xf0 | FETCH      atomic compare and exchange
-===========  ================  ===========================
+  ===========  ================  ===========================
+  imm          value             description
+  ===========  ================  ===========================
+  FETCH        0x01              modifier: return old value
+  XCHG         0xe0 | FETCH      atomic exchange
+  CMPXCHG      0xf0 | FETCH      atomic compare and exchange
+  ===========  ================  ===========================
 
 The ``FETCH`` modifier is optional for simple atomic operations, and
 always set for the complex atomic operations.  If the ``FETCH`` flag