mbox series

[RFC,v2,0/2] target/loongarch: Add loongson binary translation feature

Message ID 20240527083501.844854-1-maobibo@loongson.cn (mailing list archive)
Headers show
Series target/loongarch: Add loongson binary translation feature | expand

Message

Bibo Mao May 27, 2024, 8:34 a.m. UTC
Loongson Binary Translation (LBT) is used to accelerate binary
translation. LBT feature is added in kvm mode, not supported in TCG
mode since it is not emulated. And only LBT feature is added here, LBT
registers saving and restoring is not supported since it depeeds on LBT
feautre implemented in KVM kernel

---
v1 ... v2:
  1. Add LBT register saving and restoring in vmstate
  2. Add two pseudo feature flags: default_features and forced_features.
---

Bibo Mao (2):
  target/loongarch: Add loongson binary translation feature
  target/loongarch: Implement lbt registers save/restore function

 target/loongarch/cpu.c                | 69 ++++++++++++++++++++++++
 target/loongarch/cpu.h                | 24 +++++++++
 target/loongarch/kvm/kvm.c            | 78 +++++++++++++++++++++++++++
 target/loongarch/kvm/kvm_loongarch.h  | 16 ++++++
 target/loongarch/loongarch-qmp-cmds.c |  2 +-
 target/loongarch/machine.c            | 24 +++++++++
 6 files changed, 212 insertions(+), 1 deletion(-)


base-commit: ffdd099a782556b9ead26551a6f1d070a595306d

Comments

Philippe Mathieu-Daudé May 27, 2024, 10:39 a.m. UTC | #1
Hi Bibo,

On 27/5/24 10:34, Bibo Mao wrote:
> Loongson Binary Translation (LBT) is used to accelerate binary
> translation. LBT feature is added in kvm mode, not supported in TCG
> mode since it is not emulated. And only LBT feature is added here, LBT
> registers saving and restoring is not supported since it depeeds on LBT
> feautre implemented in KVM kernel

How do you test?

Thanks,

Phil.
Bibo Mao May 28, 2024, 1:14 a.m. UTC | #2
On 2024/5/27 下午6:39, Philippe Mathieu-Daudé wrote:
> Hi Bibo,
> 
> On 27/5/24 10:34, Bibo Mao wrote:
>> Loongson Binary Translation (LBT) is used to accelerate binary
>> translation. LBT feature is added in kvm mode, not supported in TCG
>> mode since it is not emulated. And only LBT feature is added here, LBT
>> registers saving and restoring is not supported since it depeeds on LBT
>> feautre implemented in KVM kernel
> 
> How do you test?
There is a test application using LBT instruction as followings.

If LBT is not enabled, it reports illegal instruction. And it does not 
report error during VM migration.

Regards
Bibo Mao

--------------------------------------------------------------------------
#include <stdio.h>
#include <sched.h>
int main()
{
     int a = 0, b = 0;
     for (;;)
     {
         asm(
             "li.d $t0, 0xff  \n\t"
             ".word ((0x17<<18)|(0x3f<<10)|(1<<5)|0xc) \n\t" // mtflag
             ".word ((0x17<<18)|(0x3f<<10)|(0<<5)|0xc) \n\t" // mfflag
             ".word ((0x17<<18)|(0x3f<<10)|(1<<5)|0xc) \n\t" // mtflag
             "move %0, $t0 \n\t"
             : "=r"(a) : : );
         sched_yield();
         asm(
             ".word ((0x17<<18)|(0x3f<<10)|(0<<5)|0xc) \n\t" // mfflag
             "move %0, $t0 \n\t"
             : "=r"(b) : :);

         if (a != b)
         {
             printf("in: 0x%x <=> out 0x%x \n", a, b);
             return 1;
         }

         sched_yield();
         int top = 0;
         asm(
             ".word (0x8008) \n\t"                 // settm
             ".word ((0x70 << 8) | (5 << 5)) \n\t" // mttop 1
             ".word (0x8009) \n\t"                 // inctop
             : : :);
         sched_yield();
         asm(
             ".word ((0x3a0 << 5) | (0xc)) \n\t" // mfftop
             "move %0, $t0 \n\t"
             : "=r"(top) : : );

         if (top != 6)
         {
             printf("top: %d \n", top);
             return 1;
         }
     }
     return 0;
}

> 
> Thanks,
> 
> Phil.