| Message ID | 20240528115146.2870032-1-arnd@kernel.org (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | [1/4,RESEND] drm/amd/display: dynamically allocate dml2_configuration_options structures | expand |
Applied the series. Thanks! Alex On Tue, May 28, 2024 at 7:52 AM Arnd Bergmann <arnd@kernel.org> wrote: > > From: Arnd Bergmann <arnd@arndb.de> > > This structure is too large to fit on a stack, as shown by the > newly introduced warnings from a recent code change: > > drivers/gpu/drm/amd/amdgpu/../display/dc/resource/dcn32/dcn32_resource.c: In function 'dcn32_update_bw_bounding_box': > drivers/gpu/drm/amd/amdgpu/../display/dc/resource/dcn32/dcn32_resource.c:2019:1: error: the frame size of 1180 bytes is larger than 1024 bytes [-Werror=frame-larger-than=] > drivers/gpu/drm/amd/amdgpu/../display/dc/resource/dcn321/dcn321_resource.c: In function 'dcn321_update_bw_bounding_box': > drivers/gpu/drm/amd/amdgpu/../display/dc/resource/dcn321/dcn321_resource.c:1597:1: error: the frame size of 1180 bytes is larger than 1024 bytes [-Werror=frame-larger-than=] > drivers/gpu/drm/amd/amdgpu/../display/dc/core/dc_state.c: In function 'dc_state_create': > drivers/gpu/drm/amd/amdgpu/../display/dc/core/dc_state.c:219:1: error: the frame size of 1184 bytes is larger than 1024 bytes [-Werror=frame-larger-than=] > > Instead of open-coding the assignment of a large structure to a stack > variable, use an explicit kmemdup() in each case to move it off the stack. > > Fixes: e779f4587f61 ("drm/amd/display: Add handling for DC power mode") > Signed-off-by: Arnd Bergmann <arnd@arndb.de> > --- > Originally sent as https://lore.kernel.org/all/20240418083421.3956461-1-arnd@kernel.org/ > --- > .../display/dc/resource/dcn32/dcn32_resource.c | 16 +++++++++++----- > .../display/dc/resource/dcn321/dcn321_resource.c | 16 +++++++++++----- > 2 files changed, 22 insertions(+), 10 deletions(-) > > diff --git a/drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.c b/drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.c > index 022d320be1d5..0f11d7c8791c 100644 > --- a/drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.c > +++ b/drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.c > @@ -2007,21 +2007,27 @@ void dcn32_calculate_wm_and_dlg(struct dc *dc, struct dc_state *context, > > static void dcn32_update_bw_bounding_box(struct dc *dc, struct clk_bw_params *bw_params) > { > - struct dml2_configuration_options dml2_opt = dc->dml2_options; > + struct dml2_configuration_options *dml2_opt; > + > + dml2_opt = kmemdup(&dc->dml2_options, sizeof(dc->dml2_options), GFP_KERNEL); > + if (!dml2_opt) > + return; > > DC_FP_START(); > > dcn32_update_bw_bounding_box_fpu(dc, bw_params); > > - dml2_opt.use_clock_dc_limits = false; > + dml2_opt->use_clock_dc_limits = false; > if (dc->debug.using_dml2 && dc->current_state && dc->current_state->bw_ctx.dml2) > - dml2_reinit(dc, &dml2_opt, &dc->current_state->bw_ctx.dml2); > + dml2_reinit(dc, dml2_opt, &dc->current_state->bw_ctx.dml2); > > - dml2_opt.use_clock_dc_limits = true; > + dml2_opt->use_clock_dc_limits = true; > if (dc->debug.using_dml2 && dc->current_state && dc->current_state->bw_ctx.dml2_dc_power_source) > - dml2_reinit(dc, &dml2_opt, &dc->current_state->bw_ctx.dml2_dc_power_source); > + dml2_reinit(dc, dml2_opt, &dc->current_state->bw_ctx.dml2_dc_power_source); > > DC_FP_END(); > + > + kfree(dml2_opt); > } > > static struct resource_funcs dcn32_res_pool_funcs = { > diff --git a/drivers/gpu/drm/amd/display/dc/resource/dcn321/dcn321_resource.c b/drivers/gpu/drm/amd/display/dc/resource/dcn321/dcn321_resource.c > index e4b360d89b3b..07ca6f58447d 100644 > --- a/drivers/gpu/drm/amd/display/dc/resource/dcn321/dcn321_resource.c > +++ b/drivers/gpu/drm/amd/display/dc/resource/dcn321/dcn321_resource.c > @@ -1581,21 +1581,27 @@ static struct dc_cap_funcs cap_funcs = { > > static void dcn321_update_bw_bounding_box(struct dc *dc, struct clk_bw_params *bw_params) > { > - struct dml2_configuration_options dml2_opt = dc->dml2_options; > + struct dml2_configuration_options *dml2_opt; > + > + dml2_opt = kmemdup(&dc->dml2_options, sizeof(dc->dml2_options), GFP_KERNEL); > + if (!dml2_opt) > + return; > > DC_FP_START(); > > dcn321_update_bw_bounding_box_fpu(dc, bw_params); > > - dml2_opt.use_clock_dc_limits = false; > + dml2_opt->use_clock_dc_limits = false; > if (dc->debug.using_dml2 && dc->current_state && dc->current_state->bw_ctx.dml2) > - dml2_reinit(dc, &dml2_opt, &dc->current_state->bw_ctx.dml2); > + dml2_reinit(dc, dml2_opt, &dc->current_state->bw_ctx.dml2); > > - dml2_opt.use_clock_dc_limits = true; > + dml2_opt->use_clock_dc_limits = true; > if (dc->debug.using_dml2 && dc->current_state && dc->current_state->bw_ctx.dml2_dc_power_source) > - dml2_reinit(dc, &dml2_opt, &dc->current_state->bw_ctx.dml2_dc_power_source); > + dml2_reinit(dc, dml2_opt, &dc->current_state->bw_ctx.dml2_dc_power_source); > > DC_FP_END(); > + > + kfree(dml2_opt); > } > > static struct resource_funcs dcn321_res_pool_funcs = { > -- > 2.39.2 >
diff --git a/drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.c b/drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.c index 022d320be1d5..0f11d7c8791c 100644 --- a/drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.c +++ b/drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.c @@ -2007,21 +2007,27 @@ void dcn32_calculate_wm_and_dlg(struct dc *dc, struct dc_state *context, static void dcn32_update_bw_bounding_box(struct dc *dc, struct clk_bw_params *bw_params) { - struct dml2_configuration_options dml2_opt = dc->dml2_options; + struct dml2_configuration_options *dml2_opt; + + dml2_opt = kmemdup(&dc->dml2_options, sizeof(dc->dml2_options), GFP_KERNEL); + if (!dml2_opt) + return; DC_FP_START(); dcn32_update_bw_bounding_box_fpu(dc, bw_params); - dml2_opt.use_clock_dc_limits = false; + dml2_opt->use_clock_dc_limits = false; if (dc->debug.using_dml2 && dc->current_state && dc->current_state->bw_ctx.dml2) - dml2_reinit(dc, &dml2_opt, &dc->current_state->bw_ctx.dml2); + dml2_reinit(dc, dml2_opt, &dc->current_state->bw_ctx.dml2); - dml2_opt.use_clock_dc_limits = true; + dml2_opt->use_clock_dc_limits = true; if (dc->debug.using_dml2 && dc->current_state && dc->current_state->bw_ctx.dml2_dc_power_source) - dml2_reinit(dc, &dml2_opt, &dc->current_state->bw_ctx.dml2_dc_power_source); + dml2_reinit(dc, dml2_opt, &dc->current_state->bw_ctx.dml2_dc_power_source); DC_FP_END(); + + kfree(dml2_opt); } static struct resource_funcs dcn32_res_pool_funcs = { diff --git a/drivers/gpu/drm/amd/display/dc/resource/dcn321/dcn321_resource.c b/drivers/gpu/drm/amd/display/dc/resource/dcn321/dcn321_resource.c index e4b360d89b3b..07ca6f58447d 100644 --- a/drivers/gpu/drm/amd/display/dc/resource/dcn321/dcn321_resource.c +++ b/drivers/gpu/drm/amd/display/dc/resource/dcn321/dcn321_resource.c @@ -1581,21 +1581,27 @@ static struct dc_cap_funcs cap_funcs = { static void dcn321_update_bw_bounding_box(struct dc *dc, struct clk_bw_params *bw_params) { - struct dml2_configuration_options dml2_opt = dc->dml2_options; + struct dml2_configuration_options *dml2_opt; + + dml2_opt = kmemdup(&dc->dml2_options, sizeof(dc->dml2_options), GFP_KERNEL); + if (!dml2_opt) + return; DC_FP_START(); dcn321_update_bw_bounding_box_fpu(dc, bw_params); - dml2_opt.use_clock_dc_limits = false; + dml2_opt->use_clock_dc_limits = false; if (dc->debug.using_dml2 && dc->current_state && dc->current_state->bw_ctx.dml2) - dml2_reinit(dc, &dml2_opt, &dc->current_state->bw_ctx.dml2); + dml2_reinit(dc, dml2_opt, &dc->current_state->bw_ctx.dml2); - dml2_opt.use_clock_dc_limits = true; + dml2_opt->use_clock_dc_limits = true; if (dc->debug.using_dml2 && dc->current_state && dc->current_state->bw_ctx.dml2_dc_power_source) - dml2_reinit(dc, &dml2_opt, &dc->current_state->bw_ctx.dml2_dc_power_source); + dml2_reinit(dc, dml2_opt, &dc->current_state->bw_ctx.dml2_dc_power_source); DC_FP_END(); + + kfree(dml2_opt); } static struct resource_funcs dcn321_res_pool_funcs = {