| Message ID | 20240529-apol-ina2xx-fix-v2-1-ee2d76142de2@axis.com (mailing list archive) |
|---|---|
| State | Changes Requested |
| Headers | show |
| Series | hwmon: (ina2xx):Add Suppor for passing alert polarity from device tree to driver | expand |
On Wed, May 29, 2024 at 11:47:44AM +0200, Amna Waseem wrote: > Add a property to the binding to configure the Alert Polarity. > Alert pin is asserted based on the value of Alert Polarity bit of > Mask/Enable register. It is by default 0 which means Alert pin is > configured to be active low open collector. Value of 1 maps to > Inverted (active high open collector). > > Signed-off-by: Amna Waseem <Amna.Waseem@axis.com> > --- > Documentation/devicetree/bindings/hwmon/ti,ina2xx.yaml | 9 +++++++++ > 1 file changed, 9 insertions(+) > > diff --git a/Documentation/devicetree/bindings/hwmon/ti,ina2xx.yaml b/Documentation/devicetree/bindings/hwmon/ti,ina2xx.yaml > index df86c2c92037..5a16d2d94587 100644 > --- a/Documentation/devicetree/bindings/hwmon/ti,ina2xx.yaml > +++ b/Documentation/devicetree/bindings/hwmon/ti,ina2xx.yaml > @@ -66,6 +66,14 @@ properties: > description: phandle to the regulator that provides the VS supply typically > in range from 2.7 V to 5.5 V. > > + ti,alert-polarity: > + description: Alert polarity bit value of Mask/Enable register. Alert pin is > + asserted based on the value of Alert polarity Bit. Default value is Normal > + (0 which maps to active-low open collector). The other value is Inverted > + (1 which maps to active-high open collector). > + $ref: /schemas/types.yaml#/definitions/uint32 > + enum: [0, 1] There's no need for this to have a value, it's sufficient to be a flag of "ti,alert-active-high". Present would mean active-high and absent active-low. This has the added benefit the devicetree node being understandable to a reader. Thanks, Conor. > + > required: > - compatible > - reg > @@ -88,5 +96,6 @@ examples: > label = "vdd_3v0"; > shunt-resistor = <1000>; > vs-supply = <&vdd_3v0>; > + ti,alert-polarity = <1>; > }; > }; > > -- > 2.30.2 >
On 5/29/24 09:17, Conor Dooley wrote: > On Wed, May 29, 2024 at 11:47:44AM +0200, Amna Waseem wrote: >> Add a property to the binding to configure the Alert Polarity. >> Alert pin is asserted based on the value of Alert Polarity bit of >> Mask/Enable register. It is by default 0 which means Alert pin is >> configured to be active low open collector. Value of 1 maps to >> Inverted (active high open collector). >> >> Signed-off-by: Amna Waseem <Amna.Waseem@axis.com> >> --- >> Documentation/devicetree/bindings/hwmon/ti,ina2xx.yaml | 9 +++++++++ >> 1 file changed, 9 insertions(+) >> >> diff --git a/Documentation/devicetree/bindings/hwmon/ti,ina2xx.yaml b/Documentation/devicetree/bindings/hwmon/ti,ina2xx.yaml >> index df86c2c92037..5a16d2d94587 100644 >> --- a/Documentation/devicetree/bindings/hwmon/ti,ina2xx.yaml >> +++ b/Documentation/devicetree/bindings/hwmon/ti,ina2xx.yaml >> @@ -66,6 +66,14 @@ properties: >> description: phandle to the regulator that provides the VS supply typically >> in range from 2.7 V to 5.5 V. >> >> + ti,alert-polarity: >> + description: Alert polarity bit value of Mask/Enable register. Alert pin is >> + asserted based on the value of Alert polarity Bit. Default value is Normal >> + (0 which maps to active-low open collector). The other value is Inverted >> + (1 which maps to active-high open collector). >> + $ref: /schemas/types.yaml#/definitions/uint32 >> + enum: [0, 1] > > There's no need for this to have a value, it's sufficient to be a flag > of "ti,alert-active-high". Present would mean active-high and absent > active-low. This has the added benefit the devicetree node being > understandable to a reader. > Agreed, makes sense. Even better, at the same time simplifies the code. Guenter
On 5/29/24 18:20, Guenter Roeck wrote: > On 5/29/24 09:17, Conor Dooley wrote: >> On Wed, May 29, 2024 at 11:47:44AM +0200, Amna Waseem wrote: >>> Add a property to the binding to configure the Alert Polarity. >>> Alert pin is asserted based on the value of Alert Polarity bit of >>> Mask/Enable register. It is by default 0 which means Alert pin is >>> configured to be active low open collector. Value of 1 maps to >>> Inverted (active high open collector). >>> >>> Signed-off-by: Amna Waseem <Amna.Waseem@axis.com> >>> --- >>> Documentation/devicetree/bindings/hwmon/ti,ina2xx.yaml | 9 +++++++++ >>> 1 file changed, 9 insertions(+) >>> >>> diff --git a/Documentation/devicetree/bindings/hwmon/ti,ina2xx.yaml >>> b/Documentation/devicetree/bindings/hwmon/ti,ina2xx.yaml >>> index df86c2c92037..5a16d2d94587 100644 >>> --- a/Documentation/devicetree/bindings/hwmon/ti,ina2xx.yaml >>> +++ b/Documentation/devicetree/bindings/hwmon/ti,ina2xx.yaml >>> @@ -66,6 +66,14 @@ properties: >>> description: phandle to the regulator that provides the VS >>> supply typically >>> in range from 2.7 V to 5.5 V. >>> + ti,alert-polarity: >>> + description: Alert polarity bit value of Mask/Enable register. >>> Alert pin is >>> + asserted based on the value of Alert polarity Bit. Default >>> value is Normal >>> + (0 which maps to active-low open collector). The other value >>> is Inverted >>> + (1 which maps to active-high open collector). >>> + $ref: /schemas/types.yaml#/definitions/uint32 >>> + enum: [0, 1] >> >> There's no need for this to have a value, it's sufficient to be a flag >> of "ti,alert-active-high". Present would mean active-high and absent >> active-low. This has the added benefit the devicetree node being >> understandable to a reader. >> > > Agreed, makes sense. Even better, at the same time simplifies the code. > > Guenter > > Agreed. Will do it in next patch Amna
diff --git a/Documentation/devicetree/bindings/hwmon/ti,ina2xx.yaml b/Documentation/devicetree/bindings/hwmon/ti,ina2xx.yaml index df86c2c92037..5a16d2d94587 100644 --- a/Documentation/devicetree/bindings/hwmon/ti,ina2xx.yaml +++ b/Documentation/devicetree/bindings/hwmon/ti,ina2xx.yaml @@ -66,6 +66,14 @@ properties: description: phandle to the regulator that provides the VS supply typically in range from 2.7 V to 5.5 V. + ti,alert-polarity: + description: Alert polarity bit value of Mask/Enable register. Alert pin is + asserted based on the value of Alert polarity Bit. Default value is Normal + (0 which maps to active-low open collector). The other value is Inverted + (1 which maps to active-high open collector). + $ref: /schemas/types.yaml#/definitions/uint32 + enum: [0, 1] + required: - compatible - reg @@ -88,5 +96,6 @@ examples: label = "vdd_3v0"; shunt-resistor = <1000>; vs-supply = <&vdd_3v0>; + ti,alert-polarity = <1>; }; };
Add a property to the binding to configure the Alert Polarity. Alert pin is asserted based on the value of Alert Polarity bit of Mask/Enable register. It is by default 0 which means Alert pin is configured to be active low open collector. Value of 1 maps to Inverted (active high open collector). Signed-off-by: Amna Waseem <Amna.Waseem@axis.com> --- Documentation/devicetree/bindings/hwmon/ti,ina2xx.yaml | 9 +++++++++ 1 file changed, 9 insertions(+)