| Message ID | 1717135657-120818-2-git-send-email-dh10.jung@samsung.com (mailing list archive) |
|---|---|
| State | Superseded |
| Headers | show |
| Series | usb: Add quirk for writing high-low order | expand |
On 31/05/2024 08:07, Daehwan Jung wrote:
> Add a new quirk for dwc3 core to support writing high-low order.
This does not tell me more. Could be OS property as well... please
describe hardware and provide rationale why this is suitable for
bindings (also cannot be deduced from compatible).
Best regards,
Krzysztof
On Fri, May 31, 2024 at 10:10:30AM +0200, Krzysztof Kozlowski wrote: > On 31/05/2024 08:07, Daehwan Jung wrote: > > Add a new quirk for dwc3 core to support writing high-low order. > > This does not tell me more. Could be OS property as well... please > describe hardware and provide rationale why this is suitable for > bindings (also cannot be deduced from compatible). > > Hi, I'm sorry I didn't describe it in dt-bindings patches. It's described in cover-letter and other patches except in dt-bindings. I will add it in next submission. I've found out the limitation of Synopsys dwc3 controller. This can work on Host mode using xHCI. A Register related to ERST should be written high-low order not low-high order. Registers are always written low-high order following xHCI spec.(64-bit written is done in each 2 of 32-bit) That's why new quirk is needed for workaround. This quirk is used not in dwc3 controller itself, but passed to xhci quirk eventually. That's because this issue occurs in Host mode using xHCI. Below are answers from Synopsys support center. [Synopsys]- The host controller was design to support ERST setting during the RUN state. But since there is a limitation in controller in supporting separate ERSTBA_HI and ERSTBA_LO programming, It is supported when the ERSTBA is programmed in 64bit, or in 32 bit mode ERSTBA_HI before ERSTBA_LO [Synopsys]- The internal initialization of event ring fetches the "Event Ring Segment Table Entry" based on the indication of ERSTBA_LO written. Best Regards, Jung Daehwan > > Best regards, > Krzysztof > > >
On 03/06/2024 05:03, Jung Daehwan wrote: > On Fri, May 31, 2024 at 10:10:30AM +0200, Krzysztof Kozlowski wrote: >> On 31/05/2024 08:07, Daehwan Jung wrote: >>> Add a new quirk for dwc3 core to support writing high-low order. >> >> This does not tell me more. Could be OS property as well... please >> describe hardware and provide rationale why this is suitable for >> bindings (also cannot be deduced from compatible). >> >> > > Hi, > > I'm sorry I didn't describe it in dt-bindings patches. > It's described in cover-letter and other patches except in dt-bindings. > I will add it in next submission. > > I've found out the limitation of Synopsys dwc3 controller. This can work > on Host mode using xHCI. A Register related to ERST should be written > high-low order not low-high order. Registers are always written low-high order > following xHCI spec.(64-bit written is done in each 2 of 32-bit) > That's why new quirk is needed for workaround. This quirk is used not in > dwc3 controller itself, but passed to xhci quirk eventually. That's because > this issue occurs in Host mode using xHCI. > If there is only one register then you should just program it differently and it does not warrant quirk property. Best regards, Krzysztof
On Mon, Jun 03, 2024 at 08:57:16AM +0200, Krzysztof Kozlowski wrote: > On 03/06/2024 05:03, Jung Daehwan wrote: > > On Fri, May 31, 2024 at 10:10:30AM +0200, Krzysztof Kozlowski wrote: > >> On 31/05/2024 08:07, Daehwan Jung wrote: > >>> Add a new quirk for dwc3 core to support writing high-low order. > >> > >> This does not tell me more. Could be OS property as well... please > >> describe hardware and provide rationale why this is suitable for > >> bindings (also cannot be deduced from compatible). > >> > >> > > > > Hi, > > > > I'm sorry I didn't describe it in dt-bindings patches. > > It's described in cover-letter and other patches except in dt-bindings. > > I will add it in next submission. > > > > I've found out the limitation of Synopsys dwc3 controller. This can work > > on Host mode using xHCI. A Register related to ERST should be written > > high-low order not low-high order. Registers are always written low-high order > > following xHCI spec.(64-bit written is done in each 2 of 32-bit) > > That's why new quirk is needed for workaround. This quirk is used not in > > dwc3 controller itself, but passed to xhci quirk eventually. That's because > > this issue occurs in Host mode using xHCI. > > > > If there is only one register then you should just program it > differently and it does not warrant quirk property. > Could you tell me why you think it does not warrant? I think this is good to use quirk. Best Regards, Jung Deahwan > Best regards, > Krzysztof > >
On 03/06/2024 10:36, Jung Daehwan wrote: > On Mon, Jun 03, 2024 at 08:57:16AM +0200, Krzysztof Kozlowski wrote: >> On 03/06/2024 05:03, Jung Daehwan wrote: >>> On Fri, May 31, 2024 at 10:10:30AM +0200, Krzysztof Kozlowski wrote: >>>> On 31/05/2024 08:07, Daehwan Jung wrote: >>>>> Add a new quirk for dwc3 core to support writing high-low order. >>>> >>>> This does not tell me more. Could be OS property as well... please >>>> describe hardware and provide rationale why this is suitable for >>>> bindings (also cannot be deduced from compatible). >>>> >>>> >>> >>> Hi, >>> >>> I'm sorry I didn't describe it in dt-bindings patches. >>> It's described in cover-letter and other patches except in dt-bindings. >>> I will add it in next submission. >>> >>> I've found out the limitation of Synopsys dwc3 controller. This can work >>> on Host mode using xHCI. A Register related to ERST should be written >>> high-low order not low-high order. Registers are always written low-high order >>> following xHCI spec.(64-bit written is done in each 2 of 32-bit) >>> That's why new quirk is needed for workaround. This quirk is used not in >>> dwc3 controller itself, but passed to xhci quirk eventually. That's because >>> this issue occurs in Host mode using xHCI. >>> >> >> If there is only one register then you should just program it >> differently and it does not warrant quirk property. >> > > Could you tell me why you think it does not warrant? I think this is > good to use quirk. Because it is a fixed case, deduced from compatible. No need for a property for this. Best regards, Krzysztof
diff --git a/Documentation/devicetree/bindings/usb/snps,dwc3.yaml b/Documentation/devicetree/bindings/usb/snps,dwc3.yaml index 1cd0ca9..56091f4 100644 --- a/Documentation/devicetree/bindings/usb/snps,dwc3.yaml +++ b/Documentation/devicetree/bindings/usb/snps,dwc3.yaml @@ -254,6 +254,11 @@ properties: avoid -EPROTO errors with usbhid on some devices (Hikey 970). type: boolean + snps,xhci-write-64-hi-lo-quirk: + description: + When set, enable quirk for writing in high-low order. + type: boolean + snps,gfladj-refclk-lpm-sel-quirk: description: When set, run the SOF/ITP counter based on ref_clk.
Add a new quirk for dwc3 core to support writing high-low order. Signed-off-by: Daehwan Jung <dh10.jung@samsung.com> --- Documentation/devicetree/bindings/usb/snps,dwc3.yaml | 5 +++++ 1 file changed, 5 insertions(+)