diff mbox series

[v3,08/11] ARM: dts: stm32: add ethernet1 and ethernet2 support on stm32mp13

Message ID 20240603092757.71902-9-christophe.roullier@foss.st.com (mailing list archive)
State Superseded
Headers show
Series Series to deliver Ethernet for STM32MP13 | expand

Checks

Context Check Description
netdev/tree_selection success Guessing tree name failed - patch did not apply

Commit Message

Christophe Roullier June 3, 2024, 9:27 a.m. UTC
Both instances ethernet based on GMAC SNPS IP on stm32mp13.
GMAC IP version is SNPS 4.20.

Signed-off-by: Christophe Roullier <christophe.roullier@foss.st.com>
---
 arch/arm/boot/dts/st/stm32mp131.dtsi | 31 ++++++++++++++++++++++++++++
 arch/arm/boot/dts/st/stm32mp133.dtsi | 30 +++++++++++++++++++++++++++
 2 files changed, 61 insertions(+)

Comments

Marek Vasut June 3, 2024, 1:03 p.m. UTC | #1
On 6/3/24 11:27 AM, Christophe Roullier wrote:
> Both instances ethernet based on GMAC SNPS IP on stm32mp13.
> GMAC IP version is SNPS 4.20.
> 
> Signed-off-by: Christophe Roullier <christophe.roullier@foss.st.com>

I think it would be best to split off the DT patches into separate 
series so they can go through Alexandre and have the netdev patches go 
through netdev . In the next round, please send 01..07 as separate 
series and 08..10 as another one , and I suspect 11 as a separate patch.
Christophe Roullier June 4, 2024, 9:29 a.m. UTC | #2
On 6/3/24 15:03, Marek Vasut wrote:
> On 6/3/24 11:27 AM, Christophe Roullier wrote:
>> Both instances ethernet based on GMAC SNPS IP on stm32mp13.
>> GMAC IP version is SNPS 4.20.
>>
>> Signed-off-by: Christophe Roullier <christophe.roullier@foss.st.com>
>
> I think it would be best to split off the DT patches into separate 
> series so they can go through Alexandre and have the netdev patches go 
> through netdev . In the next round, please send 01..07 as separate 
> series and 08..10 as another one , and I suspect 11 as a separate patch.

Hi,

I prefer to push documentation YAML + glue + DT together, it goes 
together, further more patch 11, it is also link to MP13 Ethernet, so 
need to be in this serie.

Regards
Jakub Kicinski June 4, 2024, 1:51 p.m. UTC | #3
On Tue, 4 Jun 2024 11:29:11 +0200 Christophe ROULLIER wrote:
> I prefer to push documentation YAML + glue + DT together, it goes 
> together, further more patch 11, it is also link to MP13 Ethernet, so 
> need to be in this serie.

Unfortunately what maintainers prefer is more important.
diff mbox series

Patch

diff --git a/arch/arm/boot/dts/st/stm32mp131.dtsi b/arch/arm/boot/dts/st/stm32mp131.dtsi
index 6704ceef284d3..185054a444034 100644
--- a/arch/arm/boot/dts/st/stm32mp131.dtsi
+++ b/arch/arm/boot/dts/st/stm32mp131.dtsi
@@ -926,6 +926,37 @@  crc1: crc@58009000 {
 			status = "disabled";
 		};
 
+		ethernet1: ethernet@5800a000 {
+			compatible = "st,stm32mp13-dwmac", "snps,dwmac-4.20a";
+			reg = <0x5800a000 0x2000>;
+			reg-names = "stmmaceth";
+			interrupts-extended = <&intc GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>,
+					      <&exti 68 1>;
+			interrupt-names = "macirq", "eth_wake_irq";
+			clock-names = "stmmaceth",
+				      "mac-clk-tx",
+				      "mac-clk-rx",
+				      "ethstp",
+				      "eth-ck";
+			clocks = <&rcc ETH1MAC>,
+				 <&rcc ETH1TX>,
+				 <&rcc ETH1RX>,
+				 <&rcc ETH1STP>,
+				 <&rcc ETH1CK_K>;
+			st,syscon = <&syscfg 0x4 0xff0000>;
+			snps,mixed-burst;
+			snps,pbl = <2>;
+			snps,axi-config = <&stmmac_axi_config_1>;
+			snps,tso;
+			status = "disabled";
+
+			stmmac_axi_config_1: stmmac-axi-config {
+				snps,wr_osr_lmt = <0x7>;
+				snps,rd_osr_lmt = <0x7>;
+				snps,blen = <0 0 0 0 16 8 4>;
+			};
+		};
+
 		usbh_ohci: usb@5800c000 {
 			compatible = "generic-ohci";
 			reg = <0x5800c000 0x1000>;
diff --git a/arch/arm/boot/dts/st/stm32mp133.dtsi b/arch/arm/boot/dts/st/stm32mp133.dtsi
index 3e394c8e58b92..cba3fefd6a740 100644
--- a/arch/arm/boot/dts/st/stm32mp133.dtsi
+++ b/arch/arm/boot/dts/st/stm32mp133.dtsi
@@ -67,5 +67,35 @@  channel@18 {
 				label = "vrefint";
 			};
 		};
+
+		ethernet2: ethernet@5800e000 {
+			compatible = "st,stm32mp13-dwmac", "snps,dwmac-4.20a";
+			reg = <0x5800e000 0x2000>;
+			reg-names = "stmmaceth";
+			interrupts-extended = <&intc GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>;
+			interrupt-names = "macirq";
+			clock-names = "stmmaceth",
+				      "mac-clk-tx",
+				      "mac-clk-rx",
+				      "ethstp",
+				      "eth-ck";
+			clocks = <&rcc ETH2MAC>,
+				 <&rcc ETH2TX>,
+				 <&rcc ETH2RX>,
+				 <&rcc ETH2STP>,
+				 <&rcc ETH2CK_K>;
+			st,syscon = <&syscfg 0x4 0xff000000>;
+			snps,mixed-burst;
+			snps,pbl = <2>;
+			snps,axi-config = <&stmmac_axi_config_2>;
+			snps,tso;
+			status = "disabled";
+
+			stmmac_axi_config_2: stmmac-axi-config {
+				snps,wr_osr_lmt = <0x7>;
+				snps,rd_osr_lmt = <0x7>;
+				snps,blen = <0 0 0 0 16 8 4>;
+			};
+		};
 	};
 };