| Message ID | 20240603-panel-mipi-dbi-rgb666-v3-3-59ed53ca73da@tronnes.org (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | drm/tiny: panel-mipi-dbi: Support 18 bits per color RGB666 | expand |
On Mon, Jun 03, 2024 at 01:21:34PM +0200, Noralf Trønnes via B4 Relay wrote: > From: Noralf Trønnes <noralf@tronnes.org> > > This prepares for supporting other pixel formats than RGB565. Yes, the patch is pretty simple, however could you please expand the commit message by describing write_memory_bpw introduction. > > Signed-off-by: Noralf Trønnes <noralf@tronnes.org> > --- > drivers/gpu/drm/drm_mipi_dbi.c | 14 ++++++++++---- > include/drm/drm_mipi_dbi.h | 5 +++++ > 2 files changed, 15 insertions(+), 4 deletions(-) > > diff --git a/drivers/gpu/drm/drm_mipi_dbi.c b/drivers/gpu/drm/drm_mipi_dbi.c > index fa8aba6dc81c..77f8a828d6e0 100644 > --- a/drivers/gpu/drm/drm_mipi_dbi.c > +++ b/drivers/gpu/drm/drm_mipi_dbi.c > @@ -1079,7 +1079,7 @@ static int mipi_dbi_typec1_command_read(struct mipi_dbi *dbi, u8 *cmd, > static int mipi_dbi_typec1_command(struct mipi_dbi *dbi, u8 *cmd, > u8 *parameters, size_t num) > { > - unsigned int bpw = (*cmd == MIPI_DCS_WRITE_MEMORY_START) ? 16 : 8; > + unsigned int bpw = 8; > int ret; > > if (mipi_dbi_command_is_read(dbi, *cmd)) > @@ -1091,6 +1091,9 @@ static int mipi_dbi_typec1_command(struct mipi_dbi *dbi, u8 *cmd, > if (ret || !num) > return ret; > > + if (*cmd == MIPI_DCS_WRITE_MEMORY_START) > + bpw = dbi->write_memory_bpw; > + > return mipi_dbi_spi1_transfer(dbi, 1, parameters, num, bpw); > } > > @@ -1184,8 +1187,8 @@ static int mipi_dbi_typec3_command(struct mipi_dbi *dbi, u8 *cmd, > if (ret || !num) > return ret; > > - if (*cmd == MIPI_DCS_WRITE_MEMORY_START && !dbi->swap_bytes) > - bpw = 16; > + if (*cmd == MIPI_DCS_WRITE_MEMORY_START) > + bpw = dbi->write_memory_bpw; > > spi_bus_lock(spi->controller); > gpiod_set_value_cansleep(dbi->dc, 1); > @@ -1256,12 +1259,15 @@ int mipi_dbi_spi_init(struct spi_device *spi, struct mipi_dbi *dbi, > > dbi->spi = spi; > dbi->read_commands = mipi_dbi_dcs_read_commands; > + dbi->write_memory_bpw = 16; > > if (dc) { > dbi->command = mipi_dbi_typec3_command; > dbi->dc = dc; > - if (!spi_is_bpw_supported(spi, 16)) > + if (!spi_is_bpw_supported(spi, 16)) { > + dbi->write_memory_bpw = 8; > dbi->swap_bytes = true; > + } > } else { > dbi->command = mipi_dbi_typec1_command; > dbi->tx_buf9_len = SZ_16K; > diff --git a/include/drm/drm_mipi_dbi.h b/include/drm/drm_mipi_dbi.h > index e8e0f8d39f3a..b36596efdcc3 100644 > --- a/include/drm/drm_mipi_dbi.h > +++ b/include/drm/drm_mipi_dbi.h > @@ -56,6 +56,11 @@ struct mipi_dbi { > */ > struct spi_device *spi; > > + /** > + * @write_memory_bpw: Bits per word used on a MIPI_DCS_WRITE_MEMORY_START transfer > + */ > + unsigned int write_memory_bpw; > + > /** > * @dc: Optional D/C gpio. > */ > > -- > 2.45.1 > >
diff --git a/drivers/gpu/drm/drm_mipi_dbi.c b/drivers/gpu/drm/drm_mipi_dbi.c index fa8aba6dc81c..77f8a828d6e0 100644 --- a/drivers/gpu/drm/drm_mipi_dbi.c +++ b/drivers/gpu/drm/drm_mipi_dbi.c @@ -1079,7 +1079,7 @@ static int mipi_dbi_typec1_command_read(struct mipi_dbi *dbi, u8 *cmd, static int mipi_dbi_typec1_command(struct mipi_dbi *dbi, u8 *cmd, u8 *parameters, size_t num) { - unsigned int bpw = (*cmd == MIPI_DCS_WRITE_MEMORY_START) ? 16 : 8; + unsigned int bpw = 8; int ret; if (mipi_dbi_command_is_read(dbi, *cmd)) @@ -1091,6 +1091,9 @@ static int mipi_dbi_typec1_command(struct mipi_dbi *dbi, u8 *cmd, if (ret || !num) return ret; + if (*cmd == MIPI_DCS_WRITE_MEMORY_START) + bpw = dbi->write_memory_bpw; + return mipi_dbi_spi1_transfer(dbi, 1, parameters, num, bpw); } @@ -1184,8 +1187,8 @@ static int mipi_dbi_typec3_command(struct mipi_dbi *dbi, u8 *cmd, if (ret || !num) return ret; - if (*cmd == MIPI_DCS_WRITE_MEMORY_START && !dbi->swap_bytes) - bpw = 16; + if (*cmd == MIPI_DCS_WRITE_MEMORY_START) + bpw = dbi->write_memory_bpw; spi_bus_lock(spi->controller); gpiod_set_value_cansleep(dbi->dc, 1); @@ -1256,12 +1259,15 @@ int mipi_dbi_spi_init(struct spi_device *spi, struct mipi_dbi *dbi, dbi->spi = spi; dbi->read_commands = mipi_dbi_dcs_read_commands; + dbi->write_memory_bpw = 16; if (dc) { dbi->command = mipi_dbi_typec3_command; dbi->dc = dc; - if (!spi_is_bpw_supported(spi, 16)) + if (!spi_is_bpw_supported(spi, 16)) { + dbi->write_memory_bpw = 8; dbi->swap_bytes = true; + } } else { dbi->command = mipi_dbi_typec1_command; dbi->tx_buf9_len = SZ_16K; diff --git a/include/drm/drm_mipi_dbi.h b/include/drm/drm_mipi_dbi.h index e8e0f8d39f3a..b36596efdcc3 100644 --- a/include/drm/drm_mipi_dbi.h +++ b/include/drm/drm_mipi_dbi.h @@ -56,6 +56,11 @@ struct mipi_dbi { */ struct spi_device *spi; + /** + * @write_memory_bpw: Bits per word used on a MIPI_DCS_WRITE_MEMORY_START transfer + */ + unsigned int write_memory_bpw; + /** * @dc: Optional D/C gpio. */