Message ID | 20240604063159.29216-1-zajec5@gmail.com (mailing list archive) |
---|---|
State | New, archived |
Headers | show |
Series | [V2] arm64: dts: mediatek: mt7981: add I2C controller | expand |
On Tue, 04 Jun 2024 08:31:59 +0200, Rafał Miłecki wrote: > MT7981 has one on-SoC I2C controller that differs from recent Mediatek > blocks by having a different SLAVE_ADDR register offset (thus a custom > binding compatible string). > > Applied to v6.10-next/dts64, thanks! [1/1] arm64: dts: mediatek: mt7981: add I2C controller commit: 85ccbe8afbb4d4744f4f3a1519c5a59a8b74c87d Cheers, Angelo
diff --git a/arch/arm64/boot/dts/mediatek/mt7981b.dtsi b/arch/arm64/boot/dts/mediatek/mt7981b.dtsi index 0fc7c6d33d72..64aeeb24efac 100644 --- a/arch/arm64/boot/dts/mediatek/mt7981b.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt7981b.dtsi @@ -94,6 +94,21 @@ pwm@10048000 { #pwm-cells = <2>; }; + i2c@11007000 { + compatible = "mediatek,mt7981-i2c"; + reg = <0 0x11007000 0 0x1000>, + <0 0x10217080 0 0x80>; + interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&infracfg CLK_INFRA_I2C0_CK>, + <&infracfg CLK_INFRA_AP_DMA_CK>, + <&infracfg CLK_INFRA_I2C_MCK_CK>, + <&infracfg CLK_INFRA_I2C_PCK_CK>; + clock-names = "main", "dma", "arb", "pmic"; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + pio: pinctrl@11d00000 { compatible = "mediatek,mt7981-pinctrl"; reg = <0 0x11d00000 0 0x1000>,