| Message ID | 0960c3726a36999b38084dce6c3824882921c475.1717514638.git.jani.nikula@intel.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | drm/i915: finish the job of removing implicit dev_priv | expand |
On Tue, Jun 04, 2024 at 06:26:13PM +0300, Jani Nikula wrote: > Avoid the implicit dev_priv local variable use, and pass dev_priv > explicitly to the PIPE_LINK_N1 register macro. Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com> > > Signed-off-by: Jani Nikula <jani.nikula@intel.com> > --- > drivers/gpu/drm/i915/display/intel_display.c | 4 ++-- > drivers/gpu/drm/i915/gvt/display.c | 4 ++-- > drivers/gpu/drm/i915/gvt/handlers.c | 2 +- > drivers/gpu/drm/i915/i915_reg.h | 2 +- > drivers/gpu/drm/i915/intel_gvt_mmio_table.c | 8 ++++---- > 5 files changed, 10 insertions(+), 10 deletions(-) > > diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c > index a3249d782a8b..eef317984564 100644 > --- a/drivers/gpu/drm/i915/display/intel_display.c > +++ b/drivers/gpu/drm/i915/display/intel_display.c > @@ -2644,7 +2644,7 @@ void intel_cpu_transcoder_set_m1_n1(struct intel_crtc *crtc, > PIPE_DATA_M1(dev_priv, transcoder), > PIPE_DATA_N1(dev_priv, transcoder), > PIPE_LINK_M1(dev_priv, transcoder), > - PIPE_LINK_N1(transcoder)); > + PIPE_LINK_N1(dev_priv, transcoder)); > else > intel_set_m_n(dev_priv, m_n, > PIPE_DATA_M_G4X(pipe), PIPE_DATA_N_G4X(pipe), > @@ -3343,7 +3343,7 @@ void intel_cpu_transcoder_get_m1_n1(struct intel_crtc *crtc, > PIPE_DATA_M1(dev_priv, transcoder), > PIPE_DATA_N1(dev_priv, transcoder), > PIPE_LINK_M1(dev_priv, transcoder), > - PIPE_LINK_N1(transcoder)); > + PIPE_LINK_N1(dev_priv, transcoder)); > else > intel_get_m_n(dev_priv, m_n, > PIPE_DATA_M_G4X(pipe), PIPE_DATA_N_G4X(pipe), > diff --git a/drivers/gpu/drm/i915/gvt/display.c b/drivers/gpu/drm/i915/gvt/display.c > index eea956603cc8..95b4b76d3b45 100644 > --- a/drivers/gpu/drm/i915/gvt/display.c > +++ b/drivers/gpu/drm/i915/gvt/display.c > @@ -265,7 +265,7 @@ static void emulate_monitor_status_change(struct intel_vgpu *vgpu) > vgpu_vreg_t(vgpu, PIPE_DATA_M1(dev_priv, TRANSCODER_A)) |= 0x5b425e; > vgpu_vreg_t(vgpu, PIPE_DATA_N1(dev_priv, TRANSCODER_A)) = 0x800000; > vgpu_vreg_t(vgpu, PIPE_LINK_M1(dev_priv, TRANSCODER_A)) = 0x3cd6e; > - vgpu_vreg_t(vgpu, PIPE_LINK_N1(TRANSCODER_A)) = 0x80000; > + vgpu_vreg_t(vgpu, PIPE_LINK_N1(dev_priv, TRANSCODER_A)) = 0x80000; > > /* Enable per-DDI/PORT vreg */ > if (intel_vgpu_has_monitor_on_port(vgpu, PORT_A)) { > @@ -399,7 +399,7 @@ static void emulate_monitor_status_change(struct intel_vgpu *vgpu) > vgpu_vreg_t(vgpu, PIPE_DATA_M1(dev_priv, TRANSCODER_A)) |= 0x5b425e; > vgpu_vreg_t(vgpu, PIPE_DATA_N1(dev_priv, TRANSCODER_A)) = 0x800000; > vgpu_vreg_t(vgpu, PIPE_LINK_M1(dev_priv, TRANSCODER_A)) = 0x3cd6e; > - vgpu_vreg_t(vgpu, PIPE_LINK_N1(TRANSCODER_A)) = 0x80000; > + vgpu_vreg_t(vgpu, PIPE_LINK_N1(dev_priv, TRANSCODER_A)) = 0x80000; > } > > if (intel_vgpu_has_monitor_on_port(vgpu, PORT_B)) { > diff --git a/drivers/gpu/drm/i915/gvt/handlers.c b/drivers/gpu/drm/i915/gvt/handlers.c > index ae5a3e2a5c50..f2af234769bf 100644 > --- a/drivers/gpu/drm/i915/gvt/handlers.c > +++ b/drivers/gpu/drm/i915/gvt/handlers.c > @@ -674,7 +674,7 @@ static void vgpu_update_refresh_rate(struct intel_vgpu *vgpu) > > /* Get DP link symbol clock M/N */ > link_m = vgpu_vreg_t(vgpu, PIPE_LINK_M1(dev_priv, TRANSCODER_A)); > - link_n = vgpu_vreg_t(vgpu, PIPE_LINK_N1(TRANSCODER_A)); > + link_n = vgpu_vreg_t(vgpu, PIPE_LINK_N1(dev_priv, TRANSCODER_A)); > > /* Get H/V total from transcoder timing */ > htotal = (vgpu_vreg_t(vgpu, TRANS_HTOTAL(dev_priv, TRANSCODER_A)) >> TRANS_HTOTAL_SHIFT); > diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h > index a9f3c4a85318..ac9ef4bd176e 100644 > --- a/drivers/gpu/drm/i915/i915_reg.h > +++ b/drivers/gpu/drm/i915/i915_reg.h > @@ -2384,7 +2384,7 @@ > #define PIPE_DATA_M2(dev_priv, tran) _MMIO_TRANS2(dev_priv, tran, _PIPEA_DATA_M2) > #define PIPE_DATA_N2(dev_priv, tran) _MMIO_TRANS2(dev_priv, tran, _PIPEA_DATA_N2) > #define PIPE_LINK_M1(dev_priv, tran) _MMIO_TRANS2(dev_priv, tran, _PIPEA_LINK_M1) > -#define PIPE_LINK_N1(tran) _MMIO_TRANS2(dev_priv, tran, _PIPEA_LINK_N1) > +#define PIPE_LINK_N1(dev_priv, tran) _MMIO_TRANS2(dev_priv, tran, _PIPEA_LINK_N1) > #define PIPE_LINK_M2(tran) _MMIO_TRANS2(dev_priv, tran, _PIPEA_LINK_M2) > #define PIPE_LINK_N2(tran) _MMIO_TRANS2(dev_priv, tran, _PIPEA_LINK_N2) > > diff --git a/drivers/gpu/drm/i915/intel_gvt_mmio_table.c b/drivers/gpu/drm/i915/intel_gvt_mmio_table.c > index c08b8e755377..00ce7147a9b6 100644 > --- a/drivers/gpu/drm/i915/intel_gvt_mmio_table.c > +++ b/drivers/gpu/drm/i915/intel_gvt_mmio_table.c > @@ -271,7 +271,7 @@ static int iterate_generic_mmio(struct intel_gvt_mmio_table_iter *iter) > MMIO_D(PIPE_DATA_M2(dev_priv, TRANSCODER_A)); > MMIO_D(PIPE_DATA_N2(dev_priv, TRANSCODER_A)); > MMIO_D(PIPE_LINK_M1(dev_priv, TRANSCODER_A)); > - MMIO_D(PIPE_LINK_N1(TRANSCODER_A)); > + MMIO_D(PIPE_LINK_N1(dev_priv, TRANSCODER_A)); > MMIO_D(PIPE_LINK_M2(TRANSCODER_A)); > MMIO_D(PIPE_LINK_N2(TRANSCODER_A)); > MMIO_D(PIPE_DATA_M1(dev_priv, TRANSCODER_B)); > @@ -279,7 +279,7 @@ static int iterate_generic_mmio(struct intel_gvt_mmio_table_iter *iter) > MMIO_D(PIPE_DATA_M2(dev_priv, TRANSCODER_B)); > MMIO_D(PIPE_DATA_N2(dev_priv, TRANSCODER_B)); > MMIO_D(PIPE_LINK_M1(dev_priv, TRANSCODER_B)); > - MMIO_D(PIPE_LINK_N1(TRANSCODER_B)); > + MMIO_D(PIPE_LINK_N1(dev_priv, TRANSCODER_B)); > MMIO_D(PIPE_LINK_M2(TRANSCODER_B)); > MMIO_D(PIPE_LINK_N2(TRANSCODER_B)); > MMIO_D(PIPE_DATA_M1(dev_priv, TRANSCODER_C)); > @@ -287,7 +287,7 @@ static int iterate_generic_mmio(struct intel_gvt_mmio_table_iter *iter) > MMIO_D(PIPE_DATA_M2(dev_priv, TRANSCODER_C)); > MMIO_D(PIPE_DATA_N2(dev_priv, TRANSCODER_C)); > MMIO_D(PIPE_LINK_M1(dev_priv, TRANSCODER_C)); > - MMIO_D(PIPE_LINK_N1(TRANSCODER_C)); > + MMIO_D(PIPE_LINK_N1(dev_priv, TRANSCODER_C)); > MMIO_D(PIPE_LINK_M2(TRANSCODER_C)); > MMIO_D(PIPE_LINK_N2(TRANSCODER_C)); > MMIO_D(PIPE_DATA_M1(dev_priv, TRANSCODER_EDP)); > @@ -295,7 +295,7 @@ static int iterate_generic_mmio(struct intel_gvt_mmio_table_iter *iter) > MMIO_D(PIPE_DATA_M2(dev_priv, TRANSCODER_EDP)); > MMIO_D(PIPE_DATA_N2(dev_priv, TRANSCODER_EDP)); > MMIO_D(PIPE_LINK_M1(dev_priv, TRANSCODER_EDP)); > - MMIO_D(PIPE_LINK_N1(TRANSCODER_EDP)); > + MMIO_D(PIPE_LINK_N1(dev_priv, TRANSCODER_EDP)); > MMIO_D(PIPE_LINK_M2(TRANSCODER_EDP)); > MMIO_D(PIPE_LINK_N2(TRANSCODER_EDP)); > MMIO_D(PF_CTL(PIPE_A)); > -- > 2.39.2 >
diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c index a3249d782a8b..eef317984564 100644 --- a/drivers/gpu/drm/i915/display/intel_display.c +++ b/drivers/gpu/drm/i915/display/intel_display.c @@ -2644,7 +2644,7 @@ void intel_cpu_transcoder_set_m1_n1(struct intel_crtc *crtc, PIPE_DATA_M1(dev_priv, transcoder), PIPE_DATA_N1(dev_priv, transcoder), PIPE_LINK_M1(dev_priv, transcoder), - PIPE_LINK_N1(transcoder)); + PIPE_LINK_N1(dev_priv, transcoder)); else intel_set_m_n(dev_priv, m_n, PIPE_DATA_M_G4X(pipe), PIPE_DATA_N_G4X(pipe), @@ -3343,7 +3343,7 @@ void intel_cpu_transcoder_get_m1_n1(struct intel_crtc *crtc, PIPE_DATA_M1(dev_priv, transcoder), PIPE_DATA_N1(dev_priv, transcoder), PIPE_LINK_M1(dev_priv, transcoder), - PIPE_LINK_N1(transcoder)); + PIPE_LINK_N1(dev_priv, transcoder)); else intel_get_m_n(dev_priv, m_n, PIPE_DATA_M_G4X(pipe), PIPE_DATA_N_G4X(pipe), diff --git a/drivers/gpu/drm/i915/gvt/display.c b/drivers/gpu/drm/i915/gvt/display.c index eea956603cc8..95b4b76d3b45 100644 --- a/drivers/gpu/drm/i915/gvt/display.c +++ b/drivers/gpu/drm/i915/gvt/display.c @@ -265,7 +265,7 @@ static void emulate_monitor_status_change(struct intel_vgpu *vgpu) vgpu_vreg_t(vgpu, PIPE_DATA_M1(dev_priv, TRANSCODER_A)) |= 0x5b425e; vgpu_vreg_t(vgpu, PIPE_DATA_N1(dev_priv, TRANSCODER_A)) = 0x800000; vgpu_vreg_t(vgpu, PIPE_LINK_M1(dev_priv, TRANSCODER_A)) = 0x3cd6e; - vgpu_vreg_t(vgpu, PIPE_LINK_N1(TRANSCODER_A)) = 0x80000; + vgpu_vreg_t(vgpu, PIPE_LINK_N1(dev_priv, TRANSCODER_A)) = 0x80000; /* Enable per-DDI/PORT vreg */ if (intel_vgpu_has_monitor_on_port(vgpu, PORT_A)) { @@ -399,7 +399,7 @@ static void emulate_monitor_status_change(struct intel_vgpu *vgpu) vgpu_vreg_t(vgpu, PIPE_DATA_M1(dev_priv, TRANSCODER_A)) |= 0x5b425e; vgpu_vreg_t(vgpu, PIPE_DATA_N1(dev_priv, TRANSCODER_A)) = 0x800000; vgpu_vreg_t(vgpu, PIPE_LINK_M1(dev_priv, TRANSCODER_A)) = 0x3cd6e; - vgpu_vreg_t(vgpu, PIPE_LINK_N1(TRANSCODER_A)) = 0x80000; + vgpu_vreg_t(vgpu, PIPE_LINK_N1(dev_priv, TRANSCODER_A)) = 0x80000; } if (intel_vgpu_has_monitor_on_port(vgpu, PORT_B)) { diff --git a/drivers/gpu/drm/i915/gvt/handlers.c b/drivers/gpu/drm/i915/gvt/handlers.c index ae5a3e2a5c50..f2af234769bf 100644 --- a/drivers/gpu/drm/i915/gvt/handlers.c +++ b/drivers/gpu/drm/i915/gvt/handlers.c @@ -674,7 +674,7 @@ static void vgpu_update_refresh_rate(struct intel_vgpu *vgpu) /* Get DP link symbol clock M/N */ link_m = vgpu_vreg_t(vgpu, PIPE_LINK_M1(dev_priv, TRANSCODER_A)); - link_n = vgpu_vreg_t(vgpu, PIPE_LINK_N1(TRANSCODER_A)); + link_n = vgpu_vreg_t(vgpu, PIPE_LINK_N1(dev_priv, TRANSCODER_A)); /* Get H/V total from transcoder timing */ htotal = (vgpu_vreg_t(vgpu, TRANS_HTOTAL(dev_priv, TRANSCODER_A)) >> TRANS_HTOTAL_SHIFT); diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h index a9f3c4a85318..ac9ef4bd176e 100644 --- a/drivers/gpu/drm/i915/i915_reg.h +++ b/drivers/gpu/drm/i915/i915_reg.h @@ -2384,7 +2384,7 @@ #define PIPE_DATA_M2(dev_priv, tran) _MMIO_TRANS2(dev_priv, tran, _PIPEA_DATA_M2) #define PIPE_DATA_N2(dev_priv, tran) _MMIO_TRANS2(dev_priv, tran, _PIPEA_DATA_N2) #define PIPE_LINK_M1(dev_priv, tran) _MMIO_TRANS2(dev_priv, tran, _PIPEA_LINK_M1) -#define PIPE_LINK_N1(tran) _MMIO_TRANS2(dev_priv, tran, _PIPEA_LINK_N1) +#define PIPE_LINK_N1(dev_priv, tran) _MMIO_TRANS2(dev_priv, tran, _PIPEA_LINK_N1) #define PIPE_LINK_M2(tran) _MMIO_TRANS2(dev_priv, tran, _PIPEA_LINK_M2) #define PIPE_LINK_N2(tran) _MMIO_TRANS2(dev_priv, tran, _PIPEA_LINK_N2) diff --git a/drivers/gpu/drm/i915/intel_gvt_mmio_table.c b/drivers/gpu/drm/i915/intel_gvt_mmio_table.c index c08b8e755377..00ce7147a9b6 100644 --- a/drivers/gpu/drm/i915/intel_gvt_mmio_table.c +++ b/drivers/gpu/drm/i915/intel_gvt_mmio_table.c @@ -271,7 +271,7 @@ static int iterate_generic_mmio(struct intel_gvt_mmio_table_iter *iter) MMIO_D(PIPE_DATA_M2(dev_priv, TRANSCODER_A)); MMIO_D(PIPE_DATA_N2(dev_priv, TRANSCODER_A)); MMIO_D(PIPE_LINK_M1(dev_priv, TRANSCODER_A)); - MMIO_D(PIPE_LINK_N1(TRANSCODER_A)); + MMIO_D(PIPE_LINK_N1(dev_priv, TRANSCODER_A)); MMIO_D(PIPE_LINK_M2(TRANSCODER_A)); MMIO_D(PIPE_LINK_N2(TRANSCODER_A)); MMIO_D(PIPE_DATA_M1(dev_priv, TRANSCODER_B)); @@ -279,7 +279,7 @@ static int iterate_generic_mmio(struct intel_gvt_mmio_table_iter *iter) MMIO_D(PIPE_DATA_M2(dev_priv, TRANSCODER_B)); MMIO_D(PIPE_DATA_N2(dev_priv, TRANSCODER_B)); MMIO_D(PIPE_LINK_M1(dev_priv, TRANSCODER_B)); - MMIO_D(PIPE_LINK_N1(TRANSCODER_B)); + MMIO_D(PIPE_LINK_N1(dev_priv, TRANSCODER_B)); MMIO_D(PIPE_LINK_M2(TRANSCODER_B)); MMIO_D(PIPE_LINK_N2(TRANSCODER_B)); MMIO_D(PIPE_DATA_M1(dev_priv, TRANSCODER_C)); @@ -287,7 +287,7 @@ static int iterate_generic_mmio(struct intel_gvt_mmio_table_iter *iter) MMIO_D(PIPE_DATA_M2(dev_priv, TRANSCODER_C)); MMIO_D(PIPE_DATA_N2(dev_priv, TRANSCODER_C)); MMIO_D(PIPE_LINK_M1(dev_priv, TRANSCODER_C)); - MMIO_D(PIPE_LINK_N1(TRANSCODER_C)); + MMIO_D(PIPE_LINK_N1(dev_priv, TRANSCODER_C)); MMIO_D(PIPE_LINK_M2(TRANSCODER_C)); MMIO_D(PIPE_LINK_N2(TRANSCODER_C)); MMIO_D(PIPE_DATA_M1(dev_priv, TRANSCODER_EDP)); @@ -295,7 +295,7 @@ static int iterate_generic_mmio(struct intel_gvt_mmio_table_iter *iter) MMIO_D(PIPE_DATA_M2(dev_priv, TRANSCODER_EDP)); MMIO_D(PIPE_DATA_N2(dev_priv, TRANSCODER_EDP)); MMIO_D(PIPE_LINK_M1(dev_priv, TRANSCODER_EDP)); - MMIO_D(PIPE_LINK_N1(TRANSCODER_EDP)); + MMIO_D(PIPE_LINK_N1(dev_priv, TRANSCODER_EDP)); MMIO_D(PIPE_LINK_M2(TRANSCODER_EDP)); MMIO_D(PIPE_LINK_N2(TRANSCODER_EDP)); MMIO_D(PF_CTL(PIPE_A));
Avoid the implicit dev_priv local variable use, and pass dev_priv explicitly to the PIPE_LINK_N1 register macro. Signed-off-by: Jani Nikula <jani.nikula@intel.com> --- drivers/gpu/drm/i915/display/intel_display.c | 4 ++-- drivers/gpu/drm/i915/gvt/display.c | 4 ++-- drivers/gpu/drm/i915/gvt/handlers.c | 2 +- drivers/gpu/drm/i915/i915_reg.h | 2 +- drivers/gpu/drm/i915/intel_gvt_mmio_table.c | 8 ++++---- 5 files changed, 10 insertions(+), 10 deletions(-)