Message ID | 20240530210714.364118-1-rick.p.edgecombe@intel.com (mailing list archive) |
---|---|
Headers | show |
Series | TDX MMU prep series part 1 | expand |
On Thu, May 30, 2024 at 11:07 PM Rick Edgecombe <rick.p.edgecombe@intel.com> wrote: > > Hi, > > This is v2 of the TDX MMU prep series, split out of the giant 130 patch > TDX base enabling series [0]. It is focusing on the changes to the x86 MMU > to support TDX’s separation of private/shared EPT into separate roots. A > future breakout series will include the changes to actually interact with > the TDX module to actually map private memory. The purpose of sending out > a smaller series is to focus review, and hopefully rapidly iterate. We > would like the series to go into kvm-coco-queue when it is ready. > > I think the maturity of these patches has significantly improved during > the recent reviews. I expecting it still needs a little more work, but > think that the basic structure is in decent shape at this point. Please > consider it from the perspective of what is missing for inclusion in > kvm-coco-queue. Yes, now we're talking indeed. Mostly it's cosmetic tweaks or requests to fix/improve a few comments, but overall it's very pleasing and algorithmically clear code to read. Kudos to everyone involved. I don't expect any big issues with v3. Paolo Paolo
On Fri, 2024-06-07 at 13:39 +0200, Paolo Bonzini wrote: > > Yes, now we're talking indeed. Mostly it's cosmetic tweaks or requests > to fix/improve a few comments, but overall it's very pleasing and > algorithmically clear code to read. Kudos to everyone involved. > > I don't expect any big issues with v3. Thanks so much for the review. We'll try to turn this around quickly. In the meantime, we will likely be posting two generic series that were split out of this one: - Making max_gfn configurable per-vm. - Create a quirk for memslot deletion zapping all PTEs.