| Message ID | 20240619085322.66716-2-angelogioacchino.delregno@collabora.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | [1/3] arm64: dts: mediatek: mt8188: Fix VPPSYS0/1 node name/compatibles | expand |
On Wed, Jun 19, 2024 at 10:53:21AM +0200, AngeloGioacchino Del Regno wrote: > The MT8188 sys clocks embed a reset controller: add #reset-cells > to the binding to allow using resets. > > Fixes: 1086a5310f9c ("dt-bindings: clock: mediatek: Add new MT8188 clock") > Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Acked-by: Conor Dooley <conor.dooley@microchip.com>
Quoting AngeloGioacchino Del Regno (2024-06-19 01:53:21) > The MT8188 sys clocks embed a reset controller: add #reset-cells > to the binding to allow using resets. > > Fixes: 1086a5310f9c ("dt-bindings: clock: mediatek: Add new MT8188 clock") > Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> > --- Applied to clk-next
diff --git a/Documentation/devicetree/bindings/clock/mediatek,mt8188-sys-clock.yaml b/Documentation/devicetree/bindings/clock/mediatek,mt8188-sys-clock.yaml index 4cf8d3af9803..db13d51a4903 100644 --- a/Documentation/devicetree/bindings/clock/mediatek,mt8188-sys-clock.yaml +++ b/Documentation/devicetree/bindings/clock/mediatek,mt8188-sys-clock.yaml @@ -39,6 +39,9 @@ properties: '#clock-cells': const: 1 + '#reset-cells': + const: 1 + required: - compatible - reg
The MT8188 sys clocks embed a reset controller: add #reset-cells to the binding to allow using resets. Fixes: 1086a5310f9c ("dt-bindings: clock: mediatek: Add new MT8188 clock") Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> --- .../devicetree/bindings/clock/mediatek,mt8188-sys-clock.yaml | 3 +++ 1 file changed, 3 insertions(+)