| Message ID | 20240627005913.326662-1-marex@denx.de (mailing list archive) |
|---|---|
| State | Superseded |
| Headers | show |
| Series | arm64: dts: imx8mp: Update Fast ethernet PHY MDIO addresses to match DH i.MX8MP DHCOM rev.200 | expand |
On Thu, Jun 27, 2024 at 02:58:33AM +0200, Marek Vasut wrote: > The production DH i.MX8MP DHCOM SoM rev.200 uses updated PHY MDIO addresses > for the Fast ethernet PHYs. Update the base SoM DT to cater for this change. Where did the original values come from? Did they never work? A pre-production device? Do we need to be worried about regressions? It would be good if the commit message explained why this is safe. Andrew
On 6/27/24 9:06 PM, Andrew Lunn wrote: > On Thu, Jun 27, 2024 at 02:58:33AM +0200, Marek Vasut wrote: >> The production DH i.MX8MP DHCOM SoM rev.200 uses updated PHY MDIO addresses >> for the Fast ethernet PHYs. Update the base SoM DT to cater for this change. > > Where did the original values come from? Preproduction rev.100 SoM . > Did they never work? They did work on rev.100 SoM . > A pre-production device? Yes > Do we need to be worried about regressions? No, it is only rev.200 or newer hardware that is shipping. > It would be good if the commit message explained why this is safe. Fixed in V2, thanks.
diff --git a/arch/arm64/boot/dts/freescale/imx8mp-dhcom-som.dtsi b/arch/arm64/boot/dts/freescale/imx8mp-dhcom-som.dtsi index 848df53c48685..4f7721a44daaa 100644 --- a/arch/arm64/boot/dts/freescale/imx8mp-dhcom-som.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8mp-dhcom-som.dtsi @@ -110,14 +110,14 @@ mdio { #size-cells = <0>; /* Up to one of these two PHYs may be populated. */ - ethphy0f: ethernet-phy@0 { /* SMSC LAN8740Ai */ + ethphy0f: ethernet-phy@1 { /* SMSC LAN8740Ai */ compatible = "ethernet-phy-id0007.c110", "ethernet-phy-ieee802.3-c22"; interrupt-parent = <&gpio3>; interrupts = <19 IRQ_TYPE_LEVEL_LOW>; pinctrl-0 = <&pinctrl_ethphy0>; pinctrl-names = "default"; - reg = <0>; + reg = <1>; reset-assert-us = <1000>; reset-deassert-us = <1000>; reset-gpios = <&ioexp 4 GPIO_ACTIVE_LOW>; @@ -156,14 +156,14 @@ mdio { #size-cells = <0>; /* Up to one PHY may be populated. */ - ethphy1f: ethernet-phy@1 { /* SMSC LAN8740Ai */ + ethphy1f: ethernet-phy@2 { /* SMSC LAN8740Ai */ compatible = "ethernet-phy-id0007.c110", "ethernet-phy-ieee802.3-c22"; interrupt-parent = <&gpio4>; interrupts = <3 IRQ_TYPE_LEVEL_LOW>; pinctrl-0 = <&pinctrl_ethphy1>; pinctrl-names = "default"; - reg = <1>; + reg = <2>; reset-assert-us = <1000>; reset-deassert-us = <1000>; reset-gpios = <&gpio4 2 GPIO_ACTIVE_LOW>;
The production DH i.MX8MP DHCOM SoM rev.200 uses updated PHY MDIO addresses for the Fast ethernet PHYs. Update the base SoM DT to cater for this change. Signed-off-by: Marek Vasut <marex@denx.de> --- Cc: Conor Dooley <conor+dt@kernel.org> Cc: Fabio Estevam <festevam@gmail.com> Cc: Krzysztof Kozlowski <krzk+dt@kernel.org> Cc: Pengutronix Kernel Team <kernel@pengutronix.de> Cc: Rob Herring <robh@kernel.org> Cc: Sascha Hauer <s.hauer@pengutronix.de> Cc: Shawn Guo <shawnguo@kernel.org> Cc: devicetree@vger.kernel.org Cc: imx@lists.linux.dev Cc: kernel@dh-electronics.com Cc: linux-arm-kernel@lists.infradead.org Cc: linux-kernel@vger.kernel.org --- arch/arm64/boot/dts/freescale/imx8mp-dhcom-som.dtsi | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-)