| Message ID | 20240619-xtheadvector-v3-7-bff39eb9668e@rivosinc.com (mailing list archive) |
|---|---|
| State | New |
| Headers | show |
| Series | riscv: Add support for xtheadvector | expand |
Hi Charlie, On 2024-06-19 6:57 PM, Charlie Jenkins wrote: > The VXRM vector csr for xtheadvector has an encoding of 0xa and VXSAT > has an encoding of 0x9. > > Co-developed-by: Heiko Stuebner <heiko@sntech.de> > Signed-off-by: Heiko Stuebner <heiko@sntech.de> > Signed-off-by: Charlie Jenkins <charlie@rivosinc.com> > --- > arch/riscv/include/asm/csr.h | 2 ++ > 1 file changed, 2 insertions(+) > > diff --git a/arch/riscv/include/asm/csr.h b/arch/riscv/include/asm/csr.h > index 18e178d83401..9086639a3dde 100644 > --- a/arch/riscv/include/asm/csr.h > +++ b/arch/riscv/include/asm/csr.h > @@ -220,6 +220,8 @@ > #define VCSR_VXRM_MASK 3 > #define VCSR_VXRM_SHIFT 1 > #define VCSR_VXSAT_MASK 1 > +#define VCSR_VXSAT 0x9 > +#define VCSR_VXRM 0xa These are normal CSR indexes, so the prefix should be just "CSR_". Regards, Samuel > > /* symbolic CSR names: */ > #define CSR_CYCLE 0xc00 >
On Mon, Jul 01, 2024 at 10:49:23AM -0500, Samuel Holland wrote: > Hi Charlie, > > On 2024-06-19 6:57 PM, Charlie Jenkins wrote: > > The VXRM vector csr for xtheadvector has an encoding of 0xa and VXSAT > > has an encoding of 0x9. > > > > Co-developed-by: Heiko Stuebner <heiko@sntech.de> > > Signed-off-by: Heiko Stuebner <heiko@sntech.de> > > Signed-off-by: Charlie Jenkins <charlie@rivosinc.com> > > --- > > arch/riscv/include/asm/csr.h | 2 ++ > > 1 file changed, 2 insertions(+) > > > > diff --git a/arch/riscv/include/asm/csr.h b/arch/riscv/include/asm/csr.h > > index 18e178d83401..9086639a3dde 100644 > > --- a/arch/riscv/include/asm/csr.h > > +++ b/arch/riscv/include/asm/csr.h > > @@ -220,6 +220,8 @@ > > #define VCSR_VXRM_MASK 3 > > #define VCSR_VXRM_SHIFT 1 > > #define VCSR_VXSAT_MASK 1 > > +#define VCSR_VXSAT 0x9 > > +#define VCSR_VXRM 0xa > > These are normal CSR indexes, so the prefix should be just "CSR_". Ok, I can change them. - Charlie > > Regards, > Samuel > > > > > /* symbolic CSR names: */ > > #define CSR_CYCLE 0xc00 > > >
diff --git a/arch/riscv/include/asm/csr.h b/arch/riscv/include/asm/csr.h index 18e178d83401..9086639a3dde 100644 --- a/arch/riscv/include/asm/csr.h +++ b/arch/riscv/include/asm/csr.h @@ -220,6 +220,8 @@ #define VCSR_VXRM_MASK 3 #define VCSR_VXRM_SHIFT 1 #define VCSR_VXSAT_MASK 1 +#define VCSR_VXSAT 0x9 +#define VCSR_VXRM 0xa /* symbolic CSR names: */ #define CSR_CYCLE 0xc00