diff mbox series

phy: starfive: Correct the dphy configure process

Message ID 20240627020059.163535-1-changhuang.liang@starfivetech.com
State Accepted
Commit 8d2a3539517dbf13e970b3aabdf94b04a65d276c
Headers show
Series phy: starfive: Correct the dphy configure process | expand

Commit Message

Changhuang Liang June 27, 2024, 2 a.m. UTC
We actually want to calculate the alignment values first, then
use the alignment value to look up the data from reg_configs[].

Fixes: d3ab79553308 ("phy: starfive: Add mipi dphy tx support")

Reviewed-by: Shengyang Chen <shengyang.chen@starfivetech.com>
Signed-off-by: Changhuang Liang <changhuang.liang@starfivetech.com>
---
 drivers/phy/starfive/phy-jh7110-dphy-tx.c | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

Comments

Vinod Koul July 2, 2024, 1:35 p.m. UTC | #1
On Wed, 26 Jun 2024 19:00:59 -0700, Changhuang Liang wrote:
> We actually want to calculate the alignment values first, then
> use the alignment value to look up the data from reg_configs[].
> 
> Fixes: d3ab79553308 ("phy: starfive: Add mipi dphy tx support")
> 
> 

Applied, thanks!

[1/1] phy: starfive: Correct the dphy configure process
      commit: 8d2a3539517dbf13e970b3aabdf94b04a65d276c

Best regards,
diff mbox series

Patch

diff --git a/drivers/phy/starfive/phy-jh7110-dphy-tx.c b/drivers/phy/starfive/phy-jh7110-dphy-tx.c
index 61b0da6096e5..c64d1c91b130 100644
--- a/drivers/phy/starfive/phy-jh7110-dphy-tx.c
+++ b/drivers/phy/starfive/phy-jh7110-dphy-tx.c
@@ -235,12 +235,14 @@  static int stf_dphy_configure(struct phy *phy, union phy_configure_opts *opts)
 	const struct stf_dphy_config *p = reg_configs;
 	unsigned long alignment  = STF_DPHY_BITRATE_ALIGN;
 	u32 bitrate = opts->mipi_dphy.hs_clk_rate;
-	u32 i = stf_dphy_get_config_index(bitrate);
 	u32 tmp;
+	u32 i;
 
 	if (bitrate % alignment)
 		bitrate += alignment - (bitrate % alignment);
 
+	i = stf_dphy_get_config_index(bitrate);
+
 	tmp = readl(dphy->topsys + STF_DPHY_APBIFSAIF_SYSCFG(100));
 	tmp &= ~STF_DPHY_REFCLK_IN_SEL;
 	tmp |= FIELD_PREP(STF_DPHY_REFCLK_IN_SEL, STF_DPHY_REFCLK_12M);