| Message ID | 20240715164514.8718-2-laurentiumihalcea111@gmail.com (mailing list archive) |
|---|---|
| State | Superseded |
| Headers | show |
| Series | Add support for imx8ulp's SIM | expand |
On 15/07/2024 18:45, Laurentiu Mihalcea wrote: > From: Laurentiu Mihalcea <laurentiu.mihalcea@nxp.com> > > Add schema for imx8ulp's SIM reset controller. > > Signed-off-by: Liu Ying <victor.liu@nxp.com> > Signed-off-by: Laurentiu Mihalcea <laurentiu.mihalcea@nxp.com> ... > + clocks: > + maxItems: 1 > + > + '#reset-cells': > + const: 1 > + > + mux-controller: > + $ref: /schemas/mux/reg-mux.yaml# > + > +required: > + - compatible > + - reg > + - '#reset-cells' > + - mux-controller > + - clocks List here should have the same order as list of properties. Best regards, Krzysztof
On Mon, Jul 15, 2024 at 12:45:12PM -0400, Laurentiu Mihalcea wrote: > From: Laurentiu Mihalcea <laurentiu.mihalcea@nxp.com> > > Add schema for imx8ulp's SIM reset controller. > > Signed-off-by: Liu Ying <victor.liu@nxp.com> > Signed-off-by: Laurentiu Mihalcea <laurentiu.mihalcea@nxp.com> > --- > .../reset/nxp,imx8ulp-avd-sim-reset.yaml | 59 +++++++++++++++++++ > 1 file changed, 59 insertions(+) > create mode 100644 Documentation/devicetree/bindings/reset/nxp,imx8ulp-avd-sim-reset.yaml > > diff --git a/Documentation/devicetree/bindings/reset/nxp,imx8ulp-avd-sim-reset.yaml b/Documentation/devicetree/bindings/reset/nxp,imx8ulp-avd-sim-reset.yaml > new file mode 100644 > index 000000000000..ae03c5750fa7 > --- /dev/null > +++ b/Documentation/devicetree/bindings/reset/nxp,imx8ulp-avd-sim-reset.yaml > @@ -0,0 +1,59 @@ > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/reset/nxp,imx8ulp-avd-sim-reset.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: NXP i.MX8ULP System Integration Module Reset Controller > + > +maintainers: > + - Liu Ying <victor.liu@nxp.com> > + > +description: > Don't need '>'. > + Some instances of i.MX8ULP's SIM may offer control > + over the reset of some components of a certain domain > + (e.g: AVD-SIM). Wrap lines at 80 char. > + > +properties: > + compatible: > + items: > + - enum: > + - nxp,imx8ulp-avd-sim-reset > + - const: syscon > + > + reg: > + maxItems: 1 > + > + clocks: > + maxItems: 1 > + > + '#reset-cells': > + const: 1 > + > + mux-controller: > + $ref: /schemas/mux/reg-mux.yaml# > + > +required: > + - compatible > + - reg > + - '#reset-cells' > + - mux-controller > + - clocks > + > +additionalProperties: false > + > +examples: > + - | > + #include <dt-bindings/clock/imx8ulp-clock.h> > + syscon@2da50000 { > + compatible = "nxp,imx8ulp-avd-sim-reset", "syscon"; > + reg = <0x2da50000 0x38>; > + clocks = <&pcc5 IMX8ULP_CLK_AVD_SIM>; > + #reset-cells = <1>; > + > + mux-controller { > + compatible = "mmio-mux"; > + #mux-control-cells = <1>; > + mux-reg-masks = <0x8 0x00000200>; > + }; > + }; > -- > 2.34.1 >
diff --git a/Documentation/devicetree/bindings/reset/nxp,imx8ulp-avd-sim-reset.yaml b/Documentation/devicetree/bindings/reset/nxp,imx8ulp-avd-sim-reset.yaml new file mode 100644 index 000000000000..ae03c5750fa7 --- /dev/null +++ b/Documentation/devicetree/bindings/reset/nxp,imx8ulp-avd-sim-reset.yaml @@ -0,0 +1,59 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/reset/nxp,imx8ulp-avd-sim-reset.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: NXP i.MX8ULP System Integration Module Reset Controller + +maintainers: + - Liu Ying <victor.liu@nxp.com> + +description: > + Some instances of i.MX8ULP's SIM may offer control + over the reset of some components of a certain domain + (e.g: AVD-SIM). + +properties: + compatible: + items: + - enum: + - nxp,imx8ulp-avd-sim-reset + - const: syscon + + reg: + maxItems: 1 + + clocks: + maxItems: 1 + + '#reset-cells': + const: 1 + + mux-controller: + $ref: /schemas/mux/reg-mux.yaml# + +required: + - compatible + - reg + - '#reset-cells' + - mux-controller + - clocks + +additionalProperties: false + +examples: + - | + #include <dt-bindings/clock/imx8ulp-clock.h> + syscon@2da50000 { + compatible = "nxp,imx8ulp-avd-sim-reset", "syscon"; + reg = <0x2da50000 0x38>; + clocks = <&pcc5 IMX8ULP_CLK_AVD_SIM>; + #reset-cells = <1>; + + mux-controller { + compatible = "mmio-mux"; + #mux-control-cells = <1>; + mux-reg-masks = <0x8 0x00000200>; + }; + };