| Message ID | 20240715084519.1189624-17-smostafa@google.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | SMMUv3 nested translation support | expand |
On 7/15/24 10:45, Mostafa Saleh wrote: > Previously, to check if faults are enabled, it was sufficient to check > the current stage of translation and check the corresponding > record_faults flag. > > However, with nesting, it is possible for stage-1 (nested) translation > to trigger a stage-2 fault, so we check SMMUPTWEventInfo as it would > have the correct stage set from the page table walk. > > Signed-off-by: Mostafa Saleh <smostafa@google.com> Reviewed-by: Eric Auger <eric.auger@redhat.com> Eric > --- > hw/arm/smmuv3.c | 15 ++++++++------- > 1 file changed, 8 insertions(+), 7 deletions(-) > > diff --git a/hw/arm/smmuv3.c b/hw/arm/smmuv3.c > index 84cd314b33..d052a2ba24 100644 > --- a/hw/arm/smmuv3.c > +++ b/hw/arm/smmuv3.c > @@ -34,9 +34,10 @@ > #include "smmuv3-internal.h" > #include "smmu-internal.h" > > -#define PTW_RECORD_FAULT(cfg) (((cfg)->stage == SMMU_STAGE_1) ? \ > - (cfg)->record_faults : \ > - (cfg)->s2cfg.record_faults) > +#define PTW_RECORD_FAULT(ptw_info, cfg) (((ptw_info).stage == SMMU_STAGE_1 && \ > + (cfg)->record_faults) || \ > + ((ptw_info).stage == SMMU_STAGE_2 && \ > + (cfg)->s2cfg.record_faults)) > > /** > * smmuv3_trigger_irq - pulse @irq if enabled and update > @@ -933,7 +934,7 @@ static SMMUTranslationStatus smmuv3_do_translate(SMMUv3State *s, hwaddr addr, > event->u.f_walk_eabt.addr2 = ptw_info.addr; > break; > case SMMU_PTW_ERR_TRANSLATION: > - if (PTW_RECORD_FAULT(cfg)) { > + if (PTW_RECORD_FAULT(ptw_info, cfg)) { > event->type = SMMU_EVT_F_TRANSLATION; > event->u.f_translation.addr2 = ptw_info.addr; > event->u.f_translation.class = class; > @@ -941,7 +942,7 @@ static SMMUTranslationStatus smmuv3_do_translate(SMMUv3State *s, hwaddr addr, > } > break; > case SMMU_PTW_ERR_ADDR_SIZE: > - if (PTW_RECORD_FAULT(cfg)) { > + if (PTW_RECORD_FAULT(ptw_info, cfg)) { > event->type = SMMU_EVT_F_ADDR_SIZE; > event->u.f_addr_size.addr2 = ptw_info.addr; > event->u.f_addr_size.class = class; > @@ -949,7 +950,7 @@ static SMMUTranslationStatus smmuv3_do_translate(SMMUv3State *s, hwaddr addr, > } > break; > case SMMU_PTW_ERR_ACCESS: > - if (PTW_RECORD_FAULT(cfg)) { > + if (PTW_RECORD_FAULT(ptw_info, cfg)) { > event->type = SMMU_EVT_F_ACCESS; > event->u.f_access.addr2 = ptw_info.addr; > event->u.f_access.class = class; > @@ -957,7 +958,7 @@ static SMMUTranslationStatus smmuv3_do_translate(SMMUv3State *s, hwaddr addr, > } > break; > case SMMU_PTW_ERR_PERMISSION: > - if (PTW_RECORD_FAULT(cfg)) { > + if (PTW_RECORD_FAULT(ptw_info, cfg)) { > event->type = SMMU_EVT_F_PERMISSION; > event->u.f_permission.addr2 = ptw_info.addr; > event->u.f_permission.class = class;
diff --git a/hw/arm/smmuv3.c b/hw/arm/smmuv3.c index 84cd314b33..d052a2ba24 100644 --- a/hw/arm/smmuv3.c +++ b/hw/arm/smmuv3.c @@ -34,9 +34,10 @@ #include "smmuv3-internal.h" #include "smmu-internal.h" -#define PTW_RECORD_FAULT(cfg) (((cfg)->stage == SMMU_STAGE_1) ? \ - (cfg)->record_faults : \ - (cfg)->s2cfg.record_faults) +#define PTW_RECORD_FAULT(ptw_info, cfg) (((ptw_info).stage == SMMU_STAGE_1 && \ + (cfg)->record_faults) || \ + ((ptw_info).stage == SMMU_STAGE_2 && \ + (cfg)->s2cfg.record_faults)) /** * smmuv3_trigger_irq - pulse @irq if enabled and update @@ -933,7 +934,7 @@ static SMMUTranslationStatus smmuv3_do_translate(SMMUv3State *s, hwaddr addr, event->u.f_walk_eabt.addr2 = ptw_info.addr; break; case SMMU_PTW_ERR_TRANSLATION: - if (PTW_RECORD_FAULT(cfg)) { + if (PTW_RECORD_FAULT(ptw_info, cfg)) { event->type = SMMU_EVT_F_TRANSLATION; event->u.f_translation.addr2 = ptw_info.addr; event->u.f_translation.class = class; @@ -941,7 +942,7 @@ static SMMUTranslationStatus smmuv3_do_translate(SMMUv3State *s, hwaddr addr, } break; case SMMU_PTW_ERR_ADDR_SIZE: - if (PTW_RECORD_FAULT(cfg)) { + if (PTW_RECORD_FAULT(ptw_info, cfg)) { event->type = SMMU_EVT_F_ADDR_SIZE; event->u.f_addr_size.addr2 = ptw_info.addr; event->u.f_addr_size.class = class; @@ -949,7 +950,7 @@ static SMMUTranslationStatus smmuv3_do_translate(SMMUv3State *s, hwaddr addr, } break; case SMMU_PTW_ERR_ACCESS: - if (PTW_RECORD_FAULT(cfg)) { + if (PTW_RECORD_FAULT(ptw_info, cfg)) { event->type = SMMU_EVT_F_ACCESS; event->u.f_access.addr2 = ptw_info.addr; event->u.f_access.class = class; @@ -957,7 +958,7 @@ static SMMUTranslationStatus smmuv3_do_translate(SMMUv3State *s, hwaddr addr, } break; case SMMU_PTW_ERR_PERMISSION: - if (PTW_RECORD_FAULT(cfg)) { + if (PTW_RECORD_FAULT(ptw_info, cfg)) { event->type = SMMU_EVT_F_PERMISSION; event->u.f_permission.addr2 = ptw_info.addr; event->u.f_permission.class = class;
Previously, to check if faults are enabled, it was sufficient to check the current stage of translation and check the corresponding record_faults flag. However, with nesting, it is possible for stage-1 (nested) translation to trigger a stage-2 fault, so we check SMMUPTWEventInfo as it would have the correct stage set from the page table walk. Signed-off-by: Mostafa Saleh <smostafa@google.com> --- hw/arm/smmuv3.c | 15 ++++++++------- 1 file changed, 8 insertions(+), 7 deletions(-)