| Message ID | 6f1724aaa4f5e247163405d3f7939ac44e1c859c.1720512634.git.siyanteng@loongson.cn (mailing list archive) |
|---|---|
| State | Superseded |
| Delegated to: | Netdev Maintainers |
| Headers | show |
| Series | stmmac: Add Loongson platform support | expand |
On Tue, Jul 09, 2024 at 05:36:26PM +0800, Yanteng Si wrote: > Loongson delivers two types of the network devices: Loongson GMAC and > Loongson GNET in the framework of four CPU/Chipsets revisions: > > Chip Network PCI Dev ID Synopys Version DMA-channel > LS2K1000 CPU GMAC 0x7a03 v3.50a/v3.73a 1 > LS7A1000 Chipset GMAC 0x7a03 v3.50a/v3.73a 1 > LS2K2000 CPU GMAC 0x7a03 v3.73a 8 > LS2K2000 CPU GNET 0x7a13 v3.73a 8 > LS7A2000 Chipset GNET 0x7a13 v3.73a 1 > > The driver currently supports the chips with the Loongson GMAC network > device synthesized with a single DMA-channel available. As a > preparation before adding the Loongson GNET support detach the > Loongson GMAC-specific platform data initializations to the > loongson_gmac_data() method and preserve the common settings in the > loongson_default_data(). > > While at it drop the return value statement from the > loongson_default_data() method as redundant. Please add a word about the plat->mac_interface field value changed to NA. Something like this: "Note there is no intermediate vendor-specific PCS in between the MAC and PHY on Loongson GMAC and GNET. So the plat->mac_interface field can be freely initialized with the PHY_INTERFACE_MODE_NA value." Other than that the change looks good. Thanks. Reviewed-by: Serge Semin <fancer.lancer@gmail.com> -Serge(y) > > Signed-off-by: Feiyang Chen <chenfeiyang@loongson.cn> > Signed-off-by: Yinggang Gu <guyinggang@loongson.cn> > Signed-off-by: Yanteng Si <siyanteng@loongson.cn> > --- > .../ethernet/stmicro/stmmac/dwmac-loongson.c | 19 ++++++++++++------- > 1 file changed, 12 insertions(+), 7 deletions(-) > > diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-loongson.c b/drivers/net/ethernet/stmicro/stmmac/dwmac-loongson.c > index f39c13a74bb5..9b2e4bdf7cc7 100644 > --- a/drivers/net/ethernet/stmicro/stmmac/dwmac-loongson.c > +++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-loongson.c > @@ -11,7 +11,7 @@ > > #define PCI_DEVICE_ID_LOONGSON_GMAC 0x7a03 > > -static int loongson_default_data(struct plat_stmmacenet_data *plat) > +static void loongson_default_data(struct plat_stmmacenet_data *plat) > { > plat->clk_csr = 2; /* clk_csr_i = 20-35MHz & MDC = clk_csr_i/16 */ > plat->has_gmac = 1; > @@ -20,16 +20,14 @@ static int loongson_default_data(struct plat_stmmacenet_data *plat) > /* Set default value for multicast hash bins */ > plat->multicast_filter_bins = 256; > > + plat->mac_interface = PHY_INTERFACE_MODE_NA; > + > /* Set default value for unicast filter entries */ > plat->unicast_filter_entries = 1; > > /* Set the maxmtu to a default of JUMBO_LEN */ > plat->maxmtu = JUMBO_LEN; > > - /* Set default number of RX and TX queues to use */ > - plat->tx_queues_to_use = 1; > - plat->rx_queues_to_use = 1; > - > /* Disable Priority config by default */ > plat->tx_queues_cfg[0].use_prio = false; > plat->rx_queues_cfg[0].use_prio = false; > @@ -42,6 +40,14 @@ static int loongson_default_data(struct plat_stmmacenet_data *plat) > > plat->dma_cfg->pbl = 32; > plat->dma_cfg->pblx8 = true; > +} > + > +static int loongson_gmac_data(struct plat_stmmacenet_data *plat) > +{ > + loongson_default_data(plat); > + > + plat->tx_queues_to_use = 1; > + plat->rx_queues_to_use = 1; > > return 0; > } > @@ -111,11 +117,10 @@ static int loongson_dwmac_probe(struct pci_dev *pdev, const struct pci_device_id > } > > plat->phy_interface = phy_mode; > - plat->mac_interface = PHY_INTERFACE_MODE_GMII; > > pci_set_master(pdev); > > - loongson_default_data(plat); > + loongson_gmac_data(plat); > memset(&res, 0, sizeof(res)); > res.addr = pcim_iomap_table(pdev)[0]; > > -- > 2.31.4 >
diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-loongson.c b/drivers/net/ethernet/stmicro/stmmac/dwmac-loongson.c index f39c13a74bb5..9b2e4bdf7cc7 100644 --- a/drivers/net/ethernet/stmicro/stmmac/dwmac-loongson.c +++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-loongson.c @@ -11,7 +11,7 @@ #define PCI_DEVICE_ID_LOONGSON_GMAC 0x7a03 -static int loongson_default_data(struct plat_stmmacenet_data *plat) +static void loongson_default_data(struct plat_stmmacenet_data *plat) { plat->clk_csr = 2; /* clk_csr_i = 20-35MHz & MDC = clk_csr_i/16 */ plat->has_gmac = 1; @@ -20,16 +20,14 @@ static int loongson_default_data(struct plat_stmmacenet_data *plat) /* Set default value for multicast hash bins */ plat->multicast_filter_bins = 256; + plat->mac_interface = PHY_INTERFACE_MODE_NA; + /* Set default value for unicast filter entries */ plat->unicast_filter_entries = 1; /* Set the maxmtu to a default of JUMBO_LEN */ plat->maxmtu = JUMBO_LEN; - /* Set default number of RX and TX queues to use */ - plat->tx_queues_to_use = 1; - plat->rx_queues_to_use = 1; - /* Disable Priority config by default */ plat->tx_queues_cfg[0].use_prio = false; plat->rx_queues_cfg[0].use_prio = false; @@ -42,6 +40,14 @@ static int loongson_default_data(struct plat_stmmacenet_data *plat) plat->dma_cfg->pbl = 32; plat->dma_cfg->pblx8 = true; +} + +static int loongson_gmac_data(struct plat_stmmacenet_data *plat) +{ + loongson_default_data(plat); + + plat->tx_queues_to_use = 1; + plat->rx_queues_to_use = 1; return 0; } @@ -111,11 +117,10 @@ static int loongson_dwmac_probe(struct pci_dev *pdev, const struct pci_device_id } plat->phy_interface = phy_mode; - plat->mac_interface = PHY_INTERFACE_MODE_GMII; pci_set_master(pdev); - loongson_default_data(plat); + loongson_gmac_data(plat); memset(&res, 0, sizeof(res)); res.addr = pcim_iomap_table(pdev)[0];