| Message ID | 20240723173538.3493935-5-Shyam-sundar.S-k@amd.com (mailing list archive) |
|---|---|
| State | Superseded |
| Headers | show |
| Series | Introduce initial AMD I3C HCI driver support | expand |
Hi Shyam, kernel test robot noticed the following build errors: [auto build test ERROR on linus/master] [also build test ERROR on v6.10 next-20240723] [If your patch is applied to the wrong git tree, kindly drop us a note. And when submitting patch, we suggest to use '--base' as documented in https://git-scm.com/docs/git-format-patch#_base_tree_information] url: https://github.com/intel-lab-lkp/linux/commits/Shyam-Sundar-S-K/i3c-mipi-i3c-hci-Add-MIPI0100-ACPI-ID-to-the-I3C-Support-List/20240724-013958 base: linus/master patch link: https://lore.kernel.org/r/20240723173538.3493935-5-Shyam-sundar.S-k%40amd.com patch subject: [PATCH 4/5] i3c: mipi-i3c-hci: Add a quirk to set timing parameters config: x86_64-buildonly-randconfig-004-20240724 (https://download.01.org/0day-ci/archive/20240724/202407240917.PpEicOHG-lkp@intel.com/config) compiler: clang version 18.1.5 (https://github.com/llvm/llvm-project 617a15a9eac96088ae5e9134248d8236e34b91b1) reproduce (this is a W=1 build): (https://download.01.org/0day-ci/archive/20240724/202407240917.PpEicOHG-lkp@intel.com/reproduce) If you fix the issue in a separate patch/commit (i.e. not just a new version of the same patch/commit), kindly add following tags | Reported-by: kernel test robot <lkp@intel.com> | Closes: https://lore.kernel.org/oe-kbuild-all/202407240917.PpEicOHG-lkp@intel.com/ All errors (new ones prefixed by >>): >> drivers/i3c/master/mipi-i3c-hci/hci_quirks.c:35:2: error: call to undeclared function 'writel'; ISO C99 and later do not support implicit function declarations [-Wimplicit-function-declaration] 35 | reg_write(HCI_SCL_I3C_OD_TIMING, AMD_SCL_I3C_OD_TIMING); | ^ drivers/i3c/master/mipi-i3c-hci/hci.h:30:26: note: expanded from macro 'reg_write' 30 | #define reg_write(r, v) writel(v, hci->base_regs + (r)) | ^ >> drivers/i3c/master/mipi-i3c-hci/hci_quirks.c:37:9: error: call to undeclared function 'readl'; ISO C99 and later do not support implicit function declarations [-Wimplicit-function-declaration] 37 | data = reg_read(HCI_SDA_HOLD_SWITCH_DLY_TIMING); | ^ drivers/i3c/master/mipi-i3c-hci/hci.h:29:22: note: expanded from macro 'reg_read' 29 | #define reg_read(r) readl(hci->base_regs + (r)) | ^ 2 errors generated. vim +/writel +35 drivers/i3c/master/mipi-i3c-hci/hci_quirks.c 30 31 void amd_set_od_pp_timing(struct i3c_hci *hci) 32 { 33 u32 data; 34 > 35 reg_write(HCI_SCL_I3C_OD_TIMING, AMD_SCL_I3C_OD_TIMING); 36 reg_write(HCI_SCL_I3C_PP_TIMING, AMD_SCL_I3C_PP_TIMING); > 37 data = reg_read(HCI_SDA_HOLD_SWITCH_DLY_TIMING);
Hi Shyam, kernel test robot noticed the following build errors: [auto build test ERROR on linus/master] [also build test ERROR on v6.10 next-20240723] [If your patch is applied to the wrong git tree, kindly drop us a note. And when submitting patch, we suggest to use '--base' as documented in https://git-scm.com/docs/git-format-patch#_base_tree_information] url: https://github.com/intel-lab-lkp/linux/commits/Shyam-Sundar-S-K/i3c-mipi-i3c-hci-Add-MIPI0100-ACPI-ID-to-the-I3C-Support-List/20240724-013958 base: linus/master patch link: https://lore.kernel.org/r/20240723173538.3493935-5-Shyam-sundar.S-k%40amd.com patch subject: [PATCH 4/5] i3c: mipi-i3c-hci: Add a quirk to set timing parameters config: arm-randconfig-004-20240724 (https://download.01.org/0day-ci/archive/20240724/202407241020.dsJauFym-lkp@intel.com/config) compiler: arm-linux-gnueabi-gcc (GCC) 14.1.0 reproduce (this is a W=1 build): (https://download.01.org/0day-ci/archive/20240724/202407241020.dsJauFym-lkp@intel.com/reproduce) If you fix the issue in a separate patch/commit (i.e. not just a new version of the same patch/commit), kindly add following tags | Reported-by: kernel test robot <lkp@intel.com> | Closes: https://lore.kernel.org/oe-kbuild-all/202407241020.dsJauFym-lkp@intel.com/ All errors (new ones prefixed by >>): drivers/i3c/master/mipi-i3c-hci/hci_quirks.c: In function 'amd_i3c_hci_quirks_init': >> drivers/i3c/master/mipi-i3c-hci/hci_quirks.c:25:13: error: 'boot_cpu_data' undeclared (first use in this function) 25 | if (boot_cpu_data.x86_vendor == X86_VENDOR_AMD) { | ^~~~~~~~~~~~~ drivers/i3c/master/mipi-i3c-hci/hci_quirks.c:25:13: note: each undeclared identifier is reported only once for each function it appears in >> drivers/i3c/master/mipi-i3c-hci/hci_quirks.c:25:41: error: 'X86_VENDOR_AMD' undeclared (first use in this function); did you mean 'X86_VENDOR_ANY'? 25 | if (boot_cpu_data.x86_vendor == X86_VENDOR_AMD) { | ^~~~~~~~~~~~~~ | X86_VENDOR_ANY vim +/boot_cpu_data +25 drivers/i3c/master/mipi-i3c-hci/hci_quirks.c 22 23 void amd_i3c_hci_quirks_init(struct i3c_hci *hci) 24 { > 25 if (boot_cpu_data.x86_vendor == X86_VENDOR_AMD) { 26 hci->quirks |= HCI_QUIRK_AMD_PIO_MODE; 27 hci->quirks |= HCI_QUIRK_AMD_OD_PP_TIMING; 28 } 29 } 30
diff --git a/drivers/i3c/master/mipi-i3c-hci/core.c b/drivers/i3c/master/mipi-i3c-hci/core.c index ae5b1a144506..9fc142ca7532 100644 --- a/drivers/i3c/master/mipi-i3c-hci/core.c +++ b/drivers/i3c/master/mipi-i3c-hci/core.c @@ -784,6 +784,10 @@ static int i3c_hci_init(struct i3c_hci *hci) return ret; } + /* Configure OD and PP timings for AMD platforms */ + if (hci->quirks & HCI_QUIRK_AMD_OD_PP_TIMING) + amd_set_od_pp_timing(hci); + return 0; } diff --git a/drivers/i3c/master/mipi-i3c-hci/hci.h b/drivers/i3c/master/mipi-i3c-hci/hci.h index 56361adbcc14..f4ec6dcb2ecf 100644 --- a/drivers/i3c/master/mipi-i3c-hci/hci.h +++ b/drivers/i3c/master/mipi-i3c-hci/hci.h @@ -140,6 +140,7 @@ struct i3c_hci_dev_data { /* list of quirks */ #define HCI_QUIRK_RAW_CCC BIT(1) /* CCC framing must be explicit */ #define HCI_QUIRK_AMD_PIO_MODE BIT(2) /* Set PIO mode for AMD platforms */ +#define HCI_QUIRK_AMD_OD_PP_TIMING BIT(3) /* Set OD and PP timings for AMD platforms */ /* global functions */ @@ -148,5 +149,6 @@ void mipi_i3c_hci_pio_reset(struct i3c_hci *hci); void mipi_i3c_hci_dct_index_reset(struct i3c_hci *hci); void amd_i3c_hci_quirks_init(struct i3c_hci *hci); +void amd_set_od_pp_timing(struct i3c_hci *hci); #endif diff --git a/drivers/i3c/master/mipi-i3c-hci/hci_quirks.c b/drivers/i3c/master/mipi-i3c-hci/hci_quirks.c new file mode 100644 index 000000000000..9d8c5eedc8cc --- /dev/null +++ b/drivers/i3c/master/mipi-i3c-hci/hci_quirks.c @@ -0,0 +1,41 @@ +// SPDX-License-Identifier: GPL-2.0-or-later +/* + * AMD SOC I3C HCI quirks + * + * Copyright 2024 Advanced Micro Devices, Inc. + * + * Authors: Shyam Sundar S K <Shyam-sundar.S-k@amd.com> + * Guruvendra Punugupati <Guruvendra.Punugupati@amd.com> + */ + +#include <linux/i3c/master.h> +#include "hci.h" + +/* Timing registers */ +#define HCI_SCL_I3C_OD_TIMING 0x214 +#define HCI_SCL_I3C_PP_TIMING 0x218 +#define HCI_SDA_HOLD_SWITCH_DLY_TIMING 0x230 + +/* Timing values to configure 9MHz frequency */ +#define AMD_SCL_I3C_OD_TIMING 0x00cf00cf +#define AMD_SCL_I3C_PP_TIMING 0x00160016 + +void amd_i3c_hci_quirks_init(struct i3c_hci *hci) +{ + if (boot_cpu_data.x86_vendor == X86_VENDOR_AMD) { + hci->quirks |= HCI_QUIRK_AMD_PIO_MODE; + hci->quirks |= HCI_QUIRK_AMD_OD_PP_TIMING; + } +} + +void amd_set_od_pp_timing(struct i3c_hci *hci) +{ + u32 data; + + reg_write(HCI_SCL_I3C_OD_TIMING, AMD_SCL_I3C_OD_TIMING); + reg_write(HCI_SCL_I3C_PP_TIMING, AMD_SCL_I3C_PP_TIMING); + data = reg_read(HCI_SDA_HOLD_SWITCH_DLY_TIMING); + /* Configure maximum TX hold time */ + data |= W0_MASK(18, 16); + reg_write(HCI_SDA_HOLD_SWITCH_DLY_TIMING, data); +}