diff mbox series

[v2] rockchip/drm: vop2: add support for gamma LUT

Message ID Hk03HDb6wSSHWtEFZHUye06HR0-9YzP5nCHx9A8_kHzWSZawDrU1o1pjEGkCOJFoRg0nTB4BWEv6V0XBOjF4-0Mj44lp2TrjaQfnytzp-Pk=@proton.me (mailing list archive)
State New, archived
Headers show
Series [v2] rockchip/drm: vop2: add support for gamma LUT | expand

Commit Message

Piotr Zalewski July 24, 2024, 7:06 p.m. UTC 
Add support for gamma LUT in VOP2 driver. The implementation is based on
the one found in VOP driver and modified to be compatible with VOP2. Blue
and red channels in gamma LUT register write were swapped with respect to
how gamma LUT values are written in VOP. Write of the current video port id
to VOP2_SYS_LUT_PORT_SEL register was added before the write of DSP_LUT_EN
bit. Gamma size is set and drm color management is enabled for each video
port's CRTC except ones which have no associated device. Tested on RK3566
(Pinetab2).

Helped-by: Dragan Simic <dsimic@manjaro.org>
Signed-off-by: Piotr Zalewski <pZ010001011111@proton.me>
---

Notes:
    Changes in v2:
        - Apply code styling corrections [1]
        - Move gamma LUT write inside the vop2 lock
    
    Link to v1: https://lore.kernel.org/linux-rockchip/9736eadf6a9d8e97eef919c6b3d88828@manjaro.org/T/#t
    
    [1] https://lore.kernel.org/linux-rockchip/d019761504b540600d9fc7a585d6f95f@manjaro.org/

Comments

Piotr Zalewski July 24, 2024, 10:12 p.m. UTC | #1 
By mistake the incremental patch were sent here. The correct v2 patch was
sent in the form of a v3 patch [1]

[1] https://lore.kernel.org/linux-rockchip/TkgKVivuaLFLILPY-n3iZo_8KF-daKdqdu-0_e0HP-5Ar_8DALDeNWog2suwWKjX7eomcbGET0KZe7DlzdhK2YM6CbLbeKeFZr-MJzJMtw0=@proton.me/T/#u

On Wednesday, July 24th, 2024 at 9:06 PM, Piotr Zalewski <pZ010001011111@proton.me> wrote:

> Add support for gamma LUT in VOP2 driver. The implementation is based on
> the one found in VOP driver and modified to be compatible with VOP2. Blue
> and red channels in gamma LUT register write were swapped with respect to
> how gamma LUT values are written in VOP. Write of the current video port id
> to VOP2_SYS_LUT_PORT_SEL register was added before the write of DSP_LUT_EN
> bit. Gamma size is set and drm color management is enabled for each video
> port's CRTC except ones which have no associated device. Tested on RK3566
> (Pinetab2).
> 
> Helped-by: Dragan Simic dsimic@manjaro.org
> 
> Signed-off-by: Piotr Zalewski pZ010001011111@proton.me
> 
> ---
> 
> Notes:
> Changes in v2:
> - Apply code styling corrections [1]
> - Move gamma LUT write inside the vop2 lock
> 
> Link to v1: https://lore.kernel.org/linux-rockchip/9736eadf6a9d8e97eef919c6b3d88828@manjaro.org/T/#t
> 
> [1] https://lore.kernel.org/linux-rockchip/d019761504b540600d9fc7a585d6f95f@manjaro.org/
> 
> diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_vop2.c b/drivers/gpu/drm/rockchip/rockchip_drm_vop2.c
> index 16abdc4a59a8..37fcf544a5fd 100644
> --- a/drivers/gpu/drm/rockchip/rockchip_drm_vop2.c
> +++ b/drivers/gpu/drm/rockchip/rockchip_drm_vop2.c
> @@ -1515,9 +1515,8 @@ static void vop2_vp_dsp_lut_disable(struct vop2_video_port *vp)
> 
> static void vop2_crtc_write_gamma_lut(struct vop2 *vop2, struct drm_crtc *crtc)
> {
> - const struct vop2_data *vop2_data = vop2->data;
> 
> const struct vop2_video_port *vp = to_vop2_video_port(crtc);
> - const struct vop2_video_port_data *vp_data = &vop2_data->vp[vp->id];
> 
> + const struct vop2_video_port_data *vp_data = &vop2->data->vp[vp->id];
> 
> 
> struct drm_color_lut *lut = crtc->state->gamma_lut->data;
> 
> unsigned int i, bpc = ilog2(vp_data->gamma_lut_len);
> 
> @@ -1558,9 +1557,8 @@ static void vop2_crtc_gamma_set(struct vop2 *vop2, struct drm_crtc *crtc,
> * In order to write the LUT to the internal memory,
> * we need to first make sure the dsp_lut_en bit is cleared.
> */
> - ret =
> - readx_poll_timeout(vop2_vp_dsp_lut_is_enabled, vp, dsp_ctrl, !dsp_ctrl, 5,
> - 30 * 1000);
> + ret = readx_poll_timeout(vop2_vp_dsp_lut_is_enabled, vp, dsp_ctrl,
> + !dsp_ctrl, 5, 30 * 1000);
> 
> if (ret) {
> DRM_DEV_ERROR(vop2->dev, "display LUT RAM enable timeout!\n");
> 
> @@ -1571,9 +1569,9 @@ static void vop2_crtc_gamma_set(struct vop2 *vop2, struct drm_crtc *crtc,
> return;
> }
> 
> - vop2_crtc_write_gamma_lut(vop2, crtc);
> 
> vop2_lock(vop2);
> + vop2_crtc_write_gamma_lut(vop2, crtc);
> vop2_writel(vp->vop2, RK3568_LUT_PORT_SEL, vp->id);
> 
> 
> vop2_vp_dsp_lut_enable(vp);
diff mbox series

Patch

diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_vop2.c b/drivers/gpu/drm/rockchip/rockchip_drm_vop2.c
index 16abdc4a59a8..37fcf544a5fd 100644
--- a/drivers/gpu/drm/rockchip/rockchip_drm_vop2.c
+++ b/drivers/gpu/drm/rockchip/rockchip_drm_vop2.c
@@ -1515,9 +1515,8 @@  static void vop2_vp_dsp_lut_disable(struct vop2_video_port *vp)
 
 static void vop2_crtc_write_gamma_lut(struct vop2 *vop2, struct drm_crtc *crtc)
 {
-	const struct vop2_data *vop2_data = vop2->data;
 	const struct vop2_video_port *vp = to_vop2_video_port(crtc);
-	const struct vop2_video_port_data *vp_data = &vop2_data->vp[vp->id];
+	const struct vop2_video_port_data *vp_data = &vop2->data->vp[vp->id];
 
 	struct drm_color_lut *lut = crtc->state->gamma_lut->data;
 	unsigned int i, bpc = ilog2(vp_data->gamma_lut_len);
@@ -1558,9 +1557,8 @@  static void vop2_crtc_gamma_set(struct vop2 *vop2, struct drm_crtc *crtc,
 		 * In order to write the LUT to the internal memory,
 		 * we need to first make sure the dsp_lut_en bit is cleared.
 		 */
-		ret =
-		    readx_poll_timeout(vop2_vp_dsp_lut_is_enabled, vp, dsp_ctrl, !dsp_ctrl, 5,
-				       30 * 1000);
+		ret = readx_poll_timeout(vop2_vp_dsp_lut_is_enabled, vp, dsp_ctrl,
+				!dsp_ctrl, 5, 30 * 1000);
 
 		if (ret) {
 			DRM_DEV_ERROR(vop2->dev, "display LUT RAM enable timeout!\n");
@@ -1571,9 +1569,9 @@  static void vop2_crtc_gamma_set(struct vop2 *vop2, struct drm_crtc *crtc,
 			return;
 	}
 
-	vop2_crtc_write_gamma_lut(vop2, crtc);
 
 	vop2_lock(vop2);
+	vop2_crtc_write_gamma_lut(vop2, crtc);
 	vop2_writel(vp->vop2, RK3568_LUT_PORT_SEL, vp->id);
 
 	vop2_vp_dsp_lut_enable(vp);