diff mbox series

[kvm-unit-tests,2/6] arm: Fix kerneldoc

Message ID 20240726070456.467533-3-npiggin@gmail.com (mailing list archive)
State New, archived
Headers show
Series Checking and CI improvements | expand

Commit Message

Nicholas Piggin July 26, 2024, 7:04 a.m. UTC
Some invalid kerneldoc comments crept in while centos ci job was down.

Cc: Subhasish Ghosh <subhasish.ghosh@arm.com>
Cc: Joey Gouly <joey.gouly@arm.com>
Cc: Suzuki K Poulose <suzuki.poulose@arm.com>
Fixes: d47d370c8f ("arm: Add test for FPU/SIMD context save/restore")
Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
---
 arm/fpu.c | 24 ++++++++++++------------
 1 file changed, 12 insertions(+), 12 deletions(-)

Comments

Suzuki K Poulose July 26, 2024, 9:40 a.m. UTC | #1
On 26/07/2024 08:04, Nicholas Piggin wrote:
> Some invalid kerneldoc comments crept in while centos ci job was down.
> 
> Cc: Subhasish Ghosh <subhasish.ghosh@arm.com>
> Cc: Joey Gouly <joey.gouly@arm.com>
> Cc: Suzuki K Poulose <suzuki.poulose@arm.com>
> Fixes: d47d370c8f ("arm: Add test for FPU/SIMD context save/restore")
> Signed-off-by: Nicholas Piggin <npiggin@gmail.com>

Thanks for the fix !

Reviewed-by: Suzuki K Poulose <suzuki.poulose@arm.com>


> ---
>   arm/fpu.c | 24 ++++++++++++------------
>   1 file changed, 12 insertions(+), 12 deletions(-)
> 
> diff --git a/arm/fpu.c b/arm/fpu.c
> index 39413fc3e..edbd9a946 100644
> --- a/arm/fpu.c
> +++ b/arm/fpu.c
> @@ -212,8 +212,8 @@ static void nr_cpu_check(int nr)
>   		report_abort("At least %d cpus required", nr);
>   }
>   
> -/**
> - * @brief check if the FPU/SIMD/SVE register contents are the same as
> +/*
> + * check if the FPU/SIMD/SVE register contents are the same as
>    * the input data provided.
>    */
>   static uint32_t __fpuregs_testall(uint64_t *indata, int sve)
> @@ -256,8 +256,8 @@ static uint32_t __fpuregs_testall(uint64_t *indata, int sve)
>   	return result;
>   }
>   
> -/**
> - * @brief writes randomly sampled data into the FPU/SIMD registers.
> +/*
> + * Write randomly sampled data into the FPU/SIMD registers.
>    */
>   static void __fpuregs_writeall_random(uint64_t **indata, int sve)
>   {
> @@ -315,9 +315,9 @@ static void sveregs_testall_run(void *data)
>   	       "SVE register save/restore mask: 0x%x", result);
>   }
>   
> -/**
> - * @brief This test uses two CPUs to test FPU/SIMD save/restore
> - * @details CPU1 writes random data into FPU/SIMD registers,
> +/*
> + * This test uses two CPUs to test FPU/SIMD save/restore
> + * CPU1 writes random data into FPU/SIMD registers,
>    * CPU0 corrupts/overwrites the data and finally CPU1 checks
>    * if the data remains unchanged in its context.
>    */
> @@ -344,9 +344,9 @@ static void fpuregs_context_switch_cpu1(int sve)
>   	free(indata_local);
>   }
>   
> -/**
> - * @brief This test uses two CPUs to test FPU/SIMD save/restore
> - * @details CPU0 writes random data into FPU/SIMD registers,
> +/*
> + * This test uses two CPUs to test FPU/SIMD save/restore
> + * CPU0 writes random data into FPU/SIMD registers,
>    * CPU1 corrupts/overwrites the data and finally CPU0 checks if
>    * the data remains unchanged in its context.
>    */
> @@ -374,7 +374,7 @@ static void fpuregs_context_switch_cpu0(int sve)
>   	free(indata_local);
>   }
>   
> -/**
> +/*
>    * Checks if during context switch, FPU/SIMD registers
>    * are saved/restored.
>    */
> @@ -384,7 +384,7 @@ static void fpuregs_context_switch(void)
>   	fpuregs_context_switch_cpu1(0);
>   }
>   
> -/**
> +/*
>    * Checks if during context switch, SVE registers
>    * are saved/restored.
>    */
diff mbox series

Patch

diff --git a/arm/fpu.c b/arm/fpu.c
index 39413fc3e..edbd9a946 100644
--- a/arm/fpu.c
+++ b/arm/fpu.c
@@ -212,8 +212,8 @@  static void nr_cpu_check(int nr)
 		report_abort("At least %d cpus required", nr);
 }
 
-/**
- * @brief check if the FPU/SIMD/SVE register contents are the same as
+/*
+ * check if the FPU/SIMD/SVE register contents are the same as
  * the input data provided.
  */
 static uint32_t __fpuregs_testall(uint64_t *indata, int sve)
@@ -256,8 +256,8 @@  static uint32_t __fpuregs_testall(uint64_t *indata, int sve)
 	return result;
 }
 
-/**
- * @brief writes randomly sampled data into the FPU/SIMD registers.
+/*
+ * Write randomly sampled data into the FPU/SIMD registers.
  */
 static void __fpuregs_writeall_random(uint64_t **indata, int sve)
 {
@@ -315,9 +315,9 @@  static void sveregs_testall_run(void *data)
 	       "SVE register save/restore mask: 0x%x", result);
 }
 
-/**
- * @brief This test uses two CPUs to test FPU/SIMD save/restore
- * @details CPU1 writes random data into FPU/SIMD registers,
+/*
+ * This test uses two CPUs to test FPU/SIMD save/restore
+ * CPU1 writes random data into FPU/SIMD registers,
  * CPU0 corrupts/overwrites the data and finally CPU1 checks
  * if the data remains unchanged in its context.
  */
@@ -344,9 +344,9 @@  static void fpuregs_context_switch_cpu1(int sve)
 	free(indata_local);
 }
 
-/**
- * @brief This test uses two CPUs to test FPU/SIMD save/restore
- * @details CPU0 writes random data into FPU/SIMD registers,
+/*
+ * This test uses two CPUs to test FPU/SIMD save/restore
+ * CPU0 writes random data into FPU/SIMD registers,
  * CPU1 corrupts/overwrites the data and finally CPU0 checks if
  * the data remains unchanged in its context.
  */
@@ -374,7 +374,7 @@  static void fpuregs_context_switch_cpu0(int sve)
 	free(indata_local);
 }
 
-/**
+/*
  * Checks if during context switch, FPU/SIMD registers
  * are saved/restored.
  */
@@ -384,7 +384,7 @@  static void fpuregs_context_switch(void)
 	fpuregs_context_switch_cpu1(0);
 }
 
-/**
+/*
  * Checks if during context switch, SVE registers
  * are saved/restored.
  */