| Message ID | 21dca9f0-639f-43b0-b858-a74317954835@intel.com |
|---|---|
| State | Accepted |
| Commit | e62f81bbd24db746c9b1aa29e7b6423211262ac4 |
| Headers | show |
| Series | [GIT,PULL] Compute Express Link (CXL) for 6.11 | expand |
Dave Jiang wrote: > Hi Linus, please pull from: Linus, Dave is on vacation and he asked that I look out for this pull request. Was there something amiss with this or will it make the 6.11 merge? Thank you, Ira > > git://git.kernel.org/pub/scm/linux/kernel/git/cxl/cxl.git tags/cxl-for-6.11 > > ...to receive changes, cleanups, and fixes for CXL. > > The major additions are: > A CXL maturity map has been added to the documentation to detail the current > state of CXL enabling. It provides the status of the current state of various > CXL features to inform current and future contributors of where things are and > which areas need contribution. > > A notifier handler has been added in order for a newly created CXL memory > region to trigger the abstract distance metrics calculation. This should > bring parity for CXL memory to the same level vs hotplugged DRAM for NUMA > abstract distance calculation. The abstract distance reflects relative > performance used for memory tiering handling. > > An addition for XOR math has been added to address the CXL DPA to SPA > translation. CXL address translation did not support address interleave math > with XOR prior to this change. > > A few fixes contains: > Fix to address race condition in the CXL memory hotplug notifier. > > Add missing MODULE_DESCRIPTION() for CXL modules. > > Fix incorrect vendor debug UUID define. > > A few minor changes added: > A warning has been added to inform users of an unsupported configuration when mixing > CXL VH and RCH/RCD hierarchies. > > The ENXIO error code has been replaced with EBUSY for inject poison limit reached via > debugfs and cxl-test support. > > Moving the PCI config read in cxl_dvsec_rr_decode() to avoid unnecessary PCI config reads. > > A refactor to a common struct for DRAM and general media CXL events. > > > This pull request has appeared in the linux-next for about a week and has build > success notification from kbuild-robot. > > --- > > The following changes since commit 22a40d14b572deb80c0648557f4bd502d7e83826: > > Linux 6.10-rc6 (2024-06-30 14:40:44 -0700) > > are available in the Git repository at: > > git://git.kernel.org/pub/scm/linux/kernel/git/cxl/cxl.git tags/cxl-for-6.11 > > for you to fetch changes up to a0328b397f3339d8d17a6ec356e94b3c110b010c: > > cxl/core/pci: Move reading of control register to immediately before usage (2024-07-17 10:35:08 -0700) > > ---------------------------------------------------------------- > CXL for v6.11 merge window > > New Changes: > - Refactor to a common struct for DRAM and general media CXL events > - Add abstract distance calculation support for CXL > - Add CXL maturity map documentation to detail current state of CXL enabling > - Add warning on mixed CXL VH and RCH/RCD hierachy to inform unsupported config > - Replace ENXIO with EBUSY for inject poison limit reached via debugfs > - Replace ENXIO with EBUSY for inject poison cxl-test support > - XOR math fixup for DPA to SPA translation. Current math works for MODULO arithmetic > where HPA==SPA, however not for XOR decode. > - Move pci config read in cxl_dvsec_rr_decode() to avoid unnecessary acess > > Fixes: > - Add a fix to address race condition in CXL memory hotplug notifier > - Add missing MODULE_DESCRIPTION() for CXL modules > - Fix incorrect vendor debug UUID define > > ---------------------------------------------------------------- > Alison Schofield (6): > cxl/memdev: Replace ENXIO with EBUSY for inject poison limit reached > cxl/test: Replace ENXIO with EBUSY for inject poison limit reached > cxl/core: Fold cxl_trace_hpa() into cxl_dpa_to_hpa() > cxl: Restore XOR'd position bits during address translation > cxl/region: Verify target positions using the ordered target list > cxl: Remove defunct code calculating host bridge target positions > > Dan Williams (1): > Documentation: CXL Maturity Map > > Dave Jiang (1): > Merge branch 'for-6.11/xor_fixes' into cxl-for-next > > Fabio M. De Francesco (2): > cxl/events: Use a common struct for DRAM and General Media events > cxl/acpi: Warn on mixed CXL VH and RCH/RCD Hierarchy > > Foryun Ma (1): > cxl/core/pci: Move reading of control register to immediately before usage > > Huang Ying (3): > cxl/region: Fix a race condition in memory hotplug notifier > cxl/region: Support to calculate memory tier abstract distance > cxl/region: Simplify cxl_region_nid() > > Jeff Johnson (1): > cxl: add missing MODULE_DESCRIPTION() macros > > peng guo (1): > cxl/core: Fix incorrect vendor debug UUID define > > Documentation/ABI/testing/debugfs-cxl | 7 +- > Documentation/driver-api/cxl/index.rst | 2 + > Documentation/driver-api/cxl/maturity-map.rst | 202 ++++++++++++++++++++++++++ > MAINTAINERS | 1 + > drivers/cxl/acpi.c | 125 ++++++++-------- > drivers/cxl/core/core.h | 8 +- > drivers/cxl/core/mbox.c | 4 +- > drivers/cxl/core/pci.c | 8 +- > drivers/cxl/core/port.c | 21 +-- > drivers/cxl/core/region.c | 105 ++++++++----- > drivers/cxl/core/trace.h | 36 ++--- > drivers/cxl/cxl.h | 13 +- > drivers/cxl/cxlmem.h | 4 +- > drivers/cxl/mem.c | 1 + > drivers/cxl/pci.c | 1 + > drivers/cxl/pmem.c | 1 + > drivers/cxl/port.c | 1 + > include/linux/cxl-event.h | 45 +++--- > tools/testing/cxl/test/mem.c | 69 ++++----- > 19 files changed, 442 insertions(+), 212 deletions(-) > create mode 100644 Documentation/driver-api/cxl/maturity-map.rst
On Sun, 28 Jul 2024 at 11:33, Ira Weiny <ira.weiny@intel.com> wrote: > > Dave is on vacation and he asked that I look out for this pull request. > > Was there something amiss with this or will it make the 6.11 merge? Heh. I literally pulled it just two hours ago, I just haven't pushed out yet. It just always ended up being at the bottom of my pull queue.. Linus
The pull request you sent on Wed, 24 Jul 2024 09:53:22 -0700:
> git://git.kernel.org/pub/scm/linux/kernel/git/cxl/cxl.git tags/cxl-for-6.11
has been merged into torvalds/linux.git:
https://git.kernel.org/torvalds/c/e62f81bbd24db746c9b1aa29e7b6423211262ac4
Thank you!
Linus Torvalds wrote: > On Sun, 28 Jul 2024 at 11:33, Ira Weiny <ira.weiny@intel.com> wrote: > > > > Dave is on vacation and he asked that I look out for this pull request. > > > > Was there something amiss with this or will it make the 6.11 merge? > > Heh. I literally pulled it just two hours ago, I just haven't pushed out yet. Thanks! Ira
Hi Linus, please pull from: git://git.kernel.org/pub/scm/linux/kernel/git/cxl/cxl.git tags/cxl-for-6.11 ...to receive changes, cleanups, and fixes for CXL. The major additions are: A CXL maturity map has been added to the documentation to detail the current state of CXL enabling. It provides the status of the current state of various CXL features to inform current and future contributors of where things are and which areas need contribution. A notifier handler has been added in order for a newly created CXL memory region to trigger the abstract distance metrics calculation. This should bring parity for CXL memory to the same level vs hotplugged DRAM for NUMA abstract distance calculation. The abstract distance reflects relative performance used for memory tiering handling. An addition for XOR math has been added to address the CXL DPA to SPA translation. CXL address translation did not support address interleave math with XOR prior to this change. A few fixes contains: Fix to address race condition in the CXL memory hotplug notifier. Add missing MODULE_DESCRIPTION() for CXL modules. Fix incorrect vendor debug UUID define. A few minor changes added: A warning has been added to inform users of an unsupported configuration when mixing CXL VH and RCH/RCD hierarchies. The ENXIO error code has been replaced with EBUSY for inject poison limit reached via debugfs and cxl-test support. Moving the PCI config read in cxl_dvsec_rr_decode() to avoid unnecessary PCI config reads. A refactor to a common struct for DRAM and general media CXL events. This pull request has appeared in the linux-next for about a week and has build success notification from kbuild-robot. --- The following changes since commit 22a40d14b572deb80c0648557f4bd502d7e83826: Linux 6.10-rc6 (2024-06-30 14:40:44 -0700) are available in the Git repository at: git://git.kernel.org/pub/scm/linux/kernel/git/cxl/cxl.git tags/cxl-for-6.11 for you to fetch changes up to a0328b397f3339d8d17a6ec356e94b3c110b010c: cxl/core/pci: Move reading of control register to immediately before usage (2024-07-17 10:35:08 -0700) ---------------------------------------------------------------- CXL for v6.11 merge window New Changes: - Refactor to a common struct for DRAM and general media CXL events - Add abstract distance calculation support for CXL - Add CXL maturity map documentation to detail current state of CXL enabling - Add warning on mixed CXL VH and RCH/RCD hierachy to inform unsupported config - Replace ENXIO with EBUSY for inject poison limit reached via debugfs - Replace ENXIO with EBUSY for inject poison cxl-test support - XOR math fixup for DPA to SPA translation. Current math works for MODULO arithmetic where HPA==SPA, however not for XOR decode. - Move pci config read in cxl_dvsec_rr_decode() to avoid unnecessary acess Fixes: - Add a fix to address race condition in CXL memory hotplug notifier - Add missing MODULE_DESCRIPTION() for CXL modules - Fix incorrect vendor debug UUID define ---------------------------------------------------------------- Alison Schofield (6): cxl/memdev: Replace ENXIO with EBUSY for inject poison limit reached cxl/test: Replace ENXIO with EBUSY for inject poison limit reached cxl/core: Fold cxl_trace_hpa() into cxl_dpa_to_hpa() cxl: Restore XOR'd position bits during address translation cxl/region: Verify target positions using the ordered target list cxl: Remove defunct code calculating host bridge target positions Dan Williams (1): Documentation: CXL Maturity Map Dave Jiang (1): Merge branch 'for-6.11/xor_fixes' into cxl-for-next Fabio M. De Francesco (2): cxl/events: Use a common struct for DRAM and General Media events cxl/acpi: Warn on mixed CXL VH and RCH/RCD Hierarchy Foryun Ma (1): cxl/core/pci: Move reading of control register to immediately before usage Huang Ying (3): cxl/region: Fix a race condition in memory hotplug notifier cxl/region: Support to calculate memory tier abstract distance cxl/region: Simplify cxl_region_nid() Jeff Johnson (1): cxl: add missing MODULE_DESCRIPTION() macros peng guo (1): cxl/core: Fix incorrect vendor debug UUID define Documentation/ABI/testing/debugfs-cxl | 7 +- Documentation/driver-api/cxl/index.rst | 2 + Documentation/driver-api/cxl/maturity-map.rst | 202 ++++++++++++++++++++++++++ MAINTAINERS | 1 + drivers/cxl/acpi.c | 125 ++++++++-------- drivers/cxl/core/core.h | 8 +- drivers/cxl/core/mbox.c | 4 +- drivers/cxl/core/pci.c | 8 +- drivers/cxl/core/port.c | 21 +-- drivers/cxl/core/region.c | 105 ++++++++----- drivers/cxl/core/trace.h | 36 ++--- drivers/cxl/cxl.h | 13 +- drivers/cxl/cxlmem.h | 4 +- drivers/cxl/mem.c | 1 + drivers/cxl/pci.c | 1 + drivers/cxl/pmem.c | 1 + drivers/cxl/port.c | 1 + include/linux/cxl-event.h | 45 +++--- tools/testing/cxl/test/mem.c | 69 ++++----- 19 files changed, 442 insertions(+), 212 deletions(-) create mode 100644 Documentation/driver-api/cxl/maturity-map.rst