Message ID | 20240729120951.6601-1-tiwai@suse.de (mailing list archive) |
---|---|
State | New, archived |
Headers | show |
Series | ALSA: hda: Use non-SG allocation for the communication buffers | expand |
On Mon, 29 Jul 2024 14:09:50 +0200, Takashi Iwai wrote: > > The azx_bus->dma_type is referred only for allocating the > communication buffers like CORB/RIRB, and the allocation size is > small. Hence it doesn't have to be S/G buffer allocation, which is an > obvious overkill. Use the standard SNDRV_DMA_TYPE_DEV_WC instead. > > Looking at the commit history, this change was done together with a > workaround of memalloc fixes, and it must come from misunderstanding > of the data used there. > > Fixes: 37137ec26c2c ("ALSA: hda: Once again fix regression of page allocations with IOMMU") > Signed-off-by: Takashi Iwai <tiwai@suse.de> This turned out to be a possible breaker. The current wc page allocator has specific workarounds for x86 that doesn't use the DMA API, and this won't work with IOMMU. Another fix for x86 is needed to correct the WC page allocation behavior at first. Takashi > --- > sound/pci/hda/hda_intel.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/sound/pci/hda/hda_intel.c b/sound/pci/hda/hda_intel.c > index b33602e64d17..ad474ca9b24e 100644 > --- a/sound/pci/hda/hda_intel.c > +++ b/sound/pci/hda/hda_intel.c > @@ -1809,7 +1809,7 @@ static int azx_create(struct snd_card *card, struct pci_dev *pci, > > /* use the non-cached pages in non-snoop mode */ > if (!azx_snoop(chip)) > - azx_bus(chip)->dma_type = SNDRV_DMA_TYPE_DEV_WC_SG; > + azx_bus(chip)->dma_type = SNDRV_DMA_TYPE_DEV_WC; > > if (chip->driver_type == AZX_DRIVER_NVIDIA) { > dev_dbg(chip->card->dev, "Enable delay in RIRB handling\n"); > -- > 2.43.0 >
diff --git a/sound/pci/hda/hda_intel.c b/sound/pci/hda/hda_intel.c index b33602e64d17..ad474ca9b24e 100644 --- a/sound/pci/hda/hda_intel.c +++ b/sound/pci/hda/hda_intel.c @@ -1809,7 +1809,7 @@ static int azx_create(struct snd_card *card, struct pci_dev *pci, /* use the non-cached pages in non-snoop mode */ if (!azx_snoop(chip)) - azx_bus(chip)->dma_type = SNDRV_DMA_TYPE_DEV_WC_SG; + azx_bus(chip)->dma_type = SNDRV_DMA_TYPE_DEV_WC; if (chip->driver_type == AZX_DRIVER_NVIDIA) { dev_dbg(chip->card->dev, "Enable delay in RIRB handling\n");
The azx_bus->dma_type is referred only for allocating the communication buffers like CORB/RIRB, and the allocation size is small. Hence it doesn't have to be S/G buffer allocation, which is an obvious overkill. Use the standard SNDRV_DMA_TYPE_DEV_WC instead. Looking at the commit history, this change was done together with a workaround of memalloc fixes, and it must come from misunderstanding of the data used there. Fixes: 37137ec26c2c ("ALSA: hda: Once again fix regression of page allocations with IOMMU") Signed-off-by: Takashi Iwai <tiwai@suse.de> --- sound/pci/hda/hda_intel.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)