| Message ID | 20240711131612.98952-1-eichest@gmail.com |
|---|---|
| State | Accepted |
| Commit | 8c9f085ae3384c5dfc0bc5f2f785b7adbf7d756b |
| Headers | show |
| Series | [v1] phy: marvell: phy-mvebu-cp110-comphy: improve eth_port1 on comphy4 | expand |
On Thu, 11 Jul 2024 15:12:47 +0200, Stefan Eichenberger wrote: > According to the CN9100_MPP_information document, CP_SRD4 (comphy 4) > supports 2500 BASE-X and 5000 BASE-R for ETH_PORT1. I was able to test > that 2500 BASE-X is indeed supported. Unfortunately, our HW does not > support 5000 BASE-R, but I assume from the document that it does, so I > set the muxing there too to 0x1. > > > [...] Applied, thanks! [1/1] phy: marvell: phy-mvebu-cp110-comphy: improve eth_port1 on comphy4 commit: 8c9f085ae3384c5dfc0bc5f2f785b7adbf7d756b Best regards,
diff --git a/drivers/phy/marvell/phy-mvebu-cp110-comphy.c b/drivers/phy/marvell/phy-mvebu-cp110-comphy.c index da5e8f4057490..fefc02d921e69 100644 --- a/drivers/phy/marvell/phy-mvebu-cp110-comphy.c +++ b/drivers/phy/marvell/phy-mvebu-cp110-comphy.c @@ -244,8 +244,8 @@ static const struct mvebu_comphy_conf mvebu_comphy_cp110_modes[] = { GEN_CONF(4, 1, PHY_MODE_USB_HOST_SS, COMPHY_FW_MODE_USB3H), GEN_CONF(4, 1, PHY_MODE_PCIE, COMPHY_FW_MODE_PCIE), ETH_CONF(4, 1, PHY_INTERFACE_MODE_SGMII, 0x1, COMPHY_FW_MODE_SGMII), - ETH_CONF(4, 1, PHY_INTERFACE_MODE_2500BASEX, -1, COMPHY_FW_MODE_2500BASEX), - ETH_CONF(4, 1, PHY_INTERFACE_MODE_5GBASER, -1, COMPHY_FW_MODE_XFI), + ETH_CONF(4, 1, PHY_INTERFACE_MODE_2500BASEX, 0x1, COMPHY_FW_MODE_2500BASEX), + ETH_CONF(4, 1, PHY_INTERFACE_MODE_5GBASER, 0x1, COMPHY_FW_MODE_XFI), ETH_CONF(4, 1, PHY_INTERFACE_MODE_10GBASER, -1, COMPHY_FW_MODE_XFI), /* lane 5 */ ETH_CONF(5, 1, PHY_INTERFACE_MODE_RXAUI, 0x2, COMPHY_FW_MODE_RXAUI),
According to the CN9100_MPP_information document, CP_SRD4 (comphy 4) supports 2500 BASE-X and 5000 BASE-R for ETH_PORT1. I was able to test that 2500 BASE-X is indeed supported. Unfortunately, our HW does not support 5000 BASE-R, but I assume from the document that it does, so I set the muxing there too to 0x1. Signed-off-by: Stefan Eichenberger <eichest@gmail.com> --- drivers/phy/marvell/phy-mvebu-cp110-comphy.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-)